S29GL512S10DHI020 Spansion Inc., S29GL512S10DHI020 Datasheet - Page 24

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S29GL512S10DHI020

Manufacturer Part Number
S29GL512S10DHI020
Description
IC 512 MBIT, 3V, 100NS, 64-BALL FBGA, PAGE MODE
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29GL512S10DHI020

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S29GL512S10DHI020
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4.
4.1
4.2
24
Read Operations
Asynchronous Read
Page Mode Read
Each read access may be made to any location in the memory (random access). Each random access is self-
timed with the same latency from CE# or address to valid data (t
Each random read accesses an entire 32-byte Page in parallel. Subsequent reads within the same Page
have faster read access speed. The Page is selected by the higher address bits (
word of that page is selected by the least significant address bits A3-A0. The higher address bits are kept
constant and only A3-A0 changed to select a different word in the same Page. This is an asynchronous
access with data appearing on DQ15-DQ0 when CE# remains Low, OE# remains Low, and the
asynchronous Page access time (t
access, a random read access is performed and time is required (t
D a t a
S h e e t
GL-S MirrorBit
PACC
) is satisfied. If CE# goes High and returns Low for a subsequent
( A d v a n c e
®
Family
I n f o r m a t i o n )
ACC
S29GL_128S_01GS_00_01 February 11, 2011
ACC
or t
or t
CE
CE
).
).
A
MAX
-A4), while the specific

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