LFE2M70E-5FN900C Lattice, LFE2M70E-5FN900C Datasheet - Page 382

• Manufacturer Part Number: LFE2M70E-5FN900C
• Description: IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-900
• Manufacturer: Lattice
• Series: LatticeECP2Mr

Specifications of LFE2M70E-5FN900C

• No. Of Logic Blocks: 67000
• No. Of Macrocells: 34000
• No. Of Speed Grades: 5
• Total Ram Bits: 4534Kbit
• No. Of I/o's: 416
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

www.latticesemi.com
© 2006 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
September 2006
For Further Information
A variety of technical notes for the LatticeECP2 family are available on the Lattice web site at www.latticesemi.com.
For further information about interface standards refer to the following web sites:
• LatticeECP2M SERDES/PCS Usage Guide (TN1124)
• LatticeECP2/M sysIO Usage Guide (TN1102)
• LatticeECP2/M sysCLOCK PLL Design and Usage Guide (TN1103)
• LatticeECP2/M Memory Usage Guide (TN1104)
• LatticeECP2/M High-Speed I/O Interface (TN1105)
• Power Estimation and Management for LatticeECP2/M Devices (TN1106)
• LatticeECP2/M sysDSP Usage Guide (TN1107)
• LatticeECP2/M sysCONFIG Usage Guide (TN1108)
• LatticeECP2/M Configuration Encryption Usage Guide (TN1109)
• LatticeECP2/M Soft Error Detection (SED) Usage Guide (TN1113)
• JEDEC Standards (LVTTL, LVCMOS, SSTL, HSTL): www.jedec.org
• PCI: www.pcisig.com
LatticeECP2/M Family Data Sheet
6-1
Supplemental Information
DS1006
Data Sheet DS1006
Further Info_01.0