LAN8187I-JT SMSC, LAN8187I-JT Datasheet - Page 27

• Manufacturer Part Number: LAN8187I-JT
• Description: TXRX ETHERNET 10/100 ESD PROT
• Manufacturer: SMSC
• Type: Transceiverr

Specifications of LAN8187I-JT

• Protocol: Ethernet
• Voltage - Supply: 1.6 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: Q4223799

±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX & flexPWR
Datasheet
SMSC LAN8187/LAN8187i
4.7
Most of the MII and RMII pins are multiplexed.
describes the relationship of the related device pins to what pins are used in MII and RMII mode.
Note 4.1
Note 4.2
The purpose of the Auto-negotiation function is to automatically configure the PHY to the optimum link
parameters based on the capabilities of its link partner. Auto-negotiation is a mechanism for
exchanging configuration information between two link-partners and automatically selecting the highest
performance mode of operation supported by both sides. Auto-negotiation is fully defined in clause 28
of the IEEE 802.3 specification.
Once auto-negotiation has completed, information about the resolved link can be passed back to the
controller via the Serial Management Interface (SMI). The results of the negotiation process are
reflected in the Speed Indication bits in register 31, as well as the Link Partner Ability Register
(Register 5).
The auto-negotiation protocol is a purely physical layer activity and proceeds independently of the MAC
controller.
Auto-negotiation
SIGNAL NAME
COL/CRS_DV
CLKIN/XTAL1
RX_CLK
TX_CLK
RX_ER/
TX_ER/
RX_DV
TX_EN
TXD0
TXD1
RXD4
RXD0
RXD1
TXD2
TXD3
TXD4
RXD2
RXD3
CRS
In RMII mode, this pin needs to tied to VSS.
The RX_ER signal is optional on the RMII bus. This signal is required by the PHY, but it
is optional for the MAC. The MAC can choose to ignore or not use this signal.
Table 4.2 MII/RMII Signal Mapping
DATASHEET
27
CLKIN/XTAL1
MII MODE
TM
RX_CLK
TX_CLK
RX_ER/
TX_ER/
RX_DV
TX_EN
RXD4/
Technology
RXD0
RXD1
RXD2
RXD3
TXD0
TXD1
TXD2
TXD3
TXD4
COL
CRS
Table 4.2, "MII/RMII Signal
Mapping", shown below,
RMII MODE
REF_CLK
CRS_DV
Note 4.2
Note 4.1
Note 4.1
RX_ER
TX_EN
RXD0
RXD1
Revision 1.5 (01-10-08)
TXD0
TXD1