LAN8187I-JT SMSC, LAN8187I-JT Datasheet - Page 30

• Manufacturer Part Number: LAN8187I-JT
• Description: TXRX ETHERNET 10/100 ESD PROT
• Manufacturer: SMSC
• Type: Transceiverr

Specifications of LAN8187I-JT

• Protocol: Ethernet
• Voltage - Supply: 1.6 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: Q4223799

Revision 0.6 (02-24-06)
4.9
4.9.1
4.9.2
4.10
Part of the LAN8187/LAN8187I SMSC flexPWR
regulator. This further increases the power savings as a more efficient external switching regulator can
provide the necessary +1.8v to the internal PHY circuitry.
Disable the Internal +1.8V Regulator
To disable the +1.8v internal regulator, a pulldown strapping resistor (see
Configuration Resistors,” on page
the PHY will sample the REG_EN pin to determine if the internal regulator should turn on. If the pin
is grounded to VSS, then the internal regulator is off, and the system needs to supply +1.8v +/- 10%
to the VDD_CORE pin.
A 4.7uF low ESR and 0.1uF capacitor must be added to VDD_CORE and placed close to the PHY.
This capacitance provides decoupling of the external power supply noise and ensures stability of the
internal regulator.
Enable the Internal +1.8V Regulator
To enable the internal regulator, a pull-up resistor (see
Resistors,” on page
A 4.7uF low ESR and 0.1uF capacitor must be added to VDD_CORE and placed close to the PHY.
This capacitance provides decoupling of the external power supply noise and ensures stability of the
internal regulator.
Note: For VDDIO operation below +2.5V, SMSC recommends designs add external strapping
The TX_ER, TXD4 and nINT functions share a common pin. There are two functional modes for this
pin, the TX_ER/TXD4 mode and nINT (interrupt) mode. The RXD3 pin is used to select one of these
two functional modes.
Internal +1.8V Regulator Disable
(TX_ER/TXD4)/nINT Strapping
Figure 4.4 Direct cable connection vs. Cross-over cable connection.
resistors in addition the internal strapping resistors to ensure proper strapped operation.
32) to VDDIO needs to be added to the REG_EN pin.
32) is attached from REG_EN to VDDIO. When a reset event occurs,
DATASHEET
High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
30
TM
technology is the ability to disable the internal +1.8v
Table 4.3, “Boot Strapping Configuration
Table 4.3, “Boot Strapping
SMSC LAN8187/LAN8187I
Datasheet