MT48LC16M16A2P-75 L Micron Technology Inc, MT48LC16M16A2P-75 L Datasheet - Page 46

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MT48LC16M16A2P-75 L

Manufacturer Part Number
MT48LC16M16A2P-75 L
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC16M16A2P-75 L

Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Figure 18: Mode Register Definition
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
M8
0
M9
0
1
M7
0
to ensure compatibility
Programmed Burst Length
with future devices.
Single Location Access
BA1, BA0 = “0, 0”
Write Burst Mode
Defined
M6-M0
Program
Reserved
12
A12
11
A11
Operating Mode
Standard Operation
All other states reserved
10
A10
WB
M6
0
0
0
0
1
1
1
1
9
A9
M5
Op Mode
0
0
1
1
0
0
1
1
8
M4
A8
0
1
0
1
0
1
0
1
7
A7
CAS Latency
6
A6
46
CAS Latency
5
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
A5
2
3
4
A4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
M3
BT
0
1
3
A3
M2
0
0
0
0
1
1
1
1
Burst Length
2
M1
A2
0
0
1
1
0
0
1
1
M0
256Mb: x4, x8, x16 SDRAM
1
0
1
0
1
0
1
0
1
A1
0
A0
Reserved
Reserved
Reserved
Full Page
M3 = 0
Interleaved
Burst Type
Sequential
1
2
4
8
© 1999 Micron Technology, Inc. All rights reserved.
Mode Register (Mx)
Address Bus
Burst Length
Mode Register
Reserved
Reserved
Reserved
Reserved
M3 = 1
1
2
4
8

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