ICB2FL03G Infineon Technologies, ICB2FL03G Datasheet - Page 14

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ICB2FL03G

Manufacturer Part Number
ICB2FL03G
Description
LED Drivers
Manufacturer
Infineon Technologies
Datasheet

Specifications of ICB2FL03G

Packages
PG-DSO-16
Lead Free Status / Rohs Status
 Details
Other names
ICB2FL03GXT

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HSGD (high-side gate drive, pin 16)
The gate of the high-side MOSFET in a half-bridge inverter topology is controlled by this pin. There is an active
L-level during UVLO and limitation of the max H-level at 11.0 V during normal operation. The switching
characteristics are the same as described for LSGD (pin 1). It is recommended to use a resistor of about 10 Ω
between the drive pin and gate in order to avoid oscillations and in order to shift the power dissipation of
discharging the gate capacitance into this resistor. The dead time between LSGD signal and HSGD signals is
self-adapting between 1.05 µs and 2.1 µs (typically).
2
This section describes applications and functionality of the chip.
2.1
The schematic shown in
universal input voltage from 90 V
this schematic.
Figure 3
2.2
This section describes the basic operation flow (8 phases) from the UVLO (Under Voltage Lock Out) into run mode
without any error detection. For detailed information see
different phases during a typical start from UVLO (phase 1,
into normal operation (no failure detected).
If the AC line input is switched ON, the V
UVLO). If V
and low side filament detection during the start-up hysteresis (phase 2,
Preliminary Data Sheet
90 ...
270 VAC
L101
C1
CC
Functional Description
Typical Application Circuitry
Application Circuit of Ballast for a Single Fluorescent Lamp (FL)
Normal Startup
D1...4
exceeds the first threshold of V
C2
Figure 3
R2
DR12
R1
L1
AC
Q1
R11
R12
shows a typical application for a T5 single fluorescent lamp. It is designed for
R18
up to 270 V
C10
D9
CC
D5
C12
voltage rises to the UVLO threshold V
C11
R34
R16
R14
R15
R13
CC
AC
= 10.6 V, the IC starts the first level of detection activity, the high
R20
. The following sections explain the components in reference to
PFCZCD
PFCGD
PFCVS
PFCCS
14
Section 2.2.1
R21R22R23
Controller for Fluorescent Lamp Ballasts
Figure
C13
HSVCC
HSGND
HSGD
LSGD
LSCS
4) to run mode (phase 8,
R30
C14
R26
and
R27
D6
Figure
R41
R35
Section
4).
CC
R25
Q2
Q3
= 10.6 V (no IC activity during
2.2.2.
C15
Functional Description
C40
R45
D8
D7
Figure 4
Figure
V1.1, 2012-04-10
C17
C16
R42 R43
L2
ICB2FL03G
C19
R36
shows the 8
4) and then
R44
C24

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