MAX1997ETJ Maxim Integrated Products, MAX1997ETJ Datasheet - Page 17

• Manufacturer Part Number: MAX1997ETJ
• Description: LCD Drivers
• Manufacturer: Maxim Integrated Products

Specifications of MAX1997ETJ

• Dc: 0618
• Lead Free Status / Rohs Status: No

The positive linear-regulator controller is an analog gain
block with an open-drain N-channel output. It drives an
external PNP pass transistor with a 6.8kΩ base-to-emitter
resistor (Figure 1). Its guaranteed base drive sink current
is at least 2mA. The regulator is designed to deliver 20mA
with an output capacitor of 1µF.
REG P is enabled when SHDN is high, the gate to the
input P-channel MOSFET is low, ONDC is high, V
V
complete. (See the Power-Up Sequencing and Inrush
Current Control section.) Each time it is enabled, the
regulator goes through a soft-start routine that ramps
up its reference input.
Note that the voltage rating of the DRVP output is 28V. If
higher voltages are present, an external cascode NPN
transistor should be used with the emitter connected to
DRVP, the base to V
of the PNP (Figure 4).
REG P is typically used to provide the TFT LCD gate
driver’s gate-on voltage. A sufficient voltage can be
produced using a charge-pump circuit as shown in
Figure 1. Use as many stages as necessary to obtain
the required output voltage. (See the Selecting the
Number of Charge-Pump Stages section.)
The negative linear-regulator controller is an analog
gain block with an open-drain P-channel output. It dri-
ves an external NPN pass transistor with a 6.8kΩ
base-to-emitter resistor (Figure 1). Its guaranteed base
drive source current is at least 2mA. The regulator is
designed to deliver 20mA with an output capacitor of
0.47µF.
Figure 4. Using Cascode NPN for Output Voltages > 28V
Quintuple/Triple-Output TFT LCD Power Supplies
ONP
, and the soft-start of the main step-up regulator is
DRVP
FBP
NPN CASCODE
TRANSISTOR
______________________________________________________________________________________
V
MAIN
MAIN
Negative Linear-Regulator
Positive Linear-Regulator
with Fault Protection and VCOM Buffer
, and the collector to the base
Controller, REG N
V
Controller, REG P
P
PNP PASS
TRANSISTOR
V
G_ON
CT
>
REG N is enabled when SHDN is high, the gate to the
input P-channel MOSFET is low, ONDC is high, and
V
Current Control section). Each time it is enabled, the
regulator goes through a soft-start routine that ramps
down its reference input.
Note that the voltage rating of the DRVN output is
V
cascode PNP transistor should be used with the emitter
connected to DRVN, the base to GND, and the collec-
tor to the base of the NPN (Figure 5).
REG N is typically used to provide the TFT LCD gate
driver’s gate-off voltage. A negative voltage can be pro-
duced using a charge-pump circuit as shown in Figure
1. Use as many stages as necessary to obtain the
required output voltage. (See the Selecting the Number
of Charge-Pump Stages section.)
The linear-regulator controller REG 1 is an analog gain
block with an open-drain N-channel output. It drives an
external PNP pass transistor with a 510Ω base-to-emitter
resistor (Figure 1). Its guaranteed base-drive sink current
is at least 5mA. The regulator is designed to deliver
300mA with an output capacitor of 10µF.
REG 1 is enabled when SHDN is high and the gate to
the input P-channel MOSFET is low. (See the Power-Up
Sequencing and Inrush Current Control section.) Each
time it is enabled, the regulator goes through a soft-
start routine that ramps up its reference input. REG 1 is
typically used to provide the TFT LCD timing
controller’s logic supply.
Figure 5. Using Cascode PNP for Output Voltages < VIN - 28V
CT
IN
- 28V. If lower voltages are present, an external
> V
ONN
Linear-Regulator Controller, REG 1
DRVN
FBN
REF
(see the Power-Up Sequencing and Inrush
PNP CASCODE
TRANSISTOR
V
N
NPN PASS
TRANSISTOR
(MAX1997 Only)
V
G_OFF
17