MAX1996AETI+ Maxim Integrated Products, MAX1996AETI+ Datasheet - Page 23

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MAX1996AETI+

Manufacturer Part Number
MAX1996AETI+
Description
Display Drivers CCFL Backlight Controller
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1996AETI+

Lead Free Status / Rohs Status
 Details
7) To the extent possible, high-voltage trace clearance
8) The traces to the capacitive voltage-divider on the
With MODE connected to V
CTL/SCL pins no longer behave as analog inputs;
instead, they function as an Intel SMBus-compatible 2-
wire digital interface. CRF/SDA is the bidirectional data
line and CTL/SCL is the clock line of the 2-wire inter-
face corresponding respectively to the SMBDATA and
SMBCLK lines of the SMBus. The MAX1996A uses the
Write-Byte, Read-Byte, Send-Byte, and Receive-Byte
Figure 14. SMBus Protocols
Send-Byte Format
Write-Byte Format
Read-Byte Format
S = Start condition
P = Stop condition
S
S
tions should be far away from the high-voltage
traces and the transformer.
on the transformer’s secondary should be widely
separated. The high-voltage traces should also be
separated from adjacent ground planes to prevent
capacitive coupling losses.
transformer’s secondary need to be widely separat-
ed to prevent arcing. Moving these traces to oppo-
site sides of the board can be beneficial in some
cases (Figure 13).
S
ADDRESS
Slave Address
7 bits
ADDRESS
7 bits
Slave Address
ADDRESS
7 bits
______________________________________________________________________________________
WR
1b
Shaded = Slave transmission
Ack= Acknowledged = 0
/// = Not acknowledged = 1
WR
1b
ACK
1b
ACK
1b
Command Byte: sends command
with no data; usually used for one-
shot command
Digital Interface
COMMAND
CC
WR
1b
Command Byte: selects
which register you are
reading from
8 bits
, the CRF/SDA and
Range, CCFL Backlight Controller
COMMAND
High-Efficiency, Wide Brightness
8 bits
ACK
1b
ACK
1b
Command Byte: selects
which register you are
writing to
ACK
1b
P
WR = Write = 0
RD = Read =1
COMMAND
8 bits
Receive-Byte Format
S
S
protocols (Figure 14). The SMBus protocols are docu-
mented in System Management Bus Specification
v1.08 and are available at www.sbs-forum.org.
The MAX1996A is a slave-only device and responds to
the 7-bit address 0b0101100 (i.e., with the R/W bit clear
indicating a write, this corresponds to 0x58). The
MAX1996A has three functional registers: a 5-bit bright-
ness register (BRIGHT4–BRIGHT0), a 3-bit shutdown
mode register (SHMD2–SHMDE0), and a 2-bit status
register (STATUS1–STATUS0). In addition, the device
has three identification (ID) registers: an 8-bit chip ID
register, an 8-bit chip revision register, and an 8-bit
manufacturer ID register.
CRF/SDA and CTL/SCL pins have Schmitt-trigger
inputs that can accommodate slow edges; however,
the rising and falling edges should still be faster than
1µs and 300ns, respectively.
Communication starts with the master signaling the
beginning of a transmission with a START condition,
which is a high-to-low transition on CRF/SDA, while
CTL/SCL is high. When the master has finished com-
Slave Address: repeated
due to change in data-
flow direction
Slave Address
ADDRESS
ADDRESS
7 bits
7 bits
ACK
1b
RD
RD
1b
1b
Data Byte: data goes into the register
set by the command byte
ACK
ACK
1b
1b
DATA
8 bits
Data Byte: reads from
the register set by the
command byte
Data Byte: reads data from
the register commanded
by the last read-byte or
write-byte transmission;
also used for SMBus Alert
Response return address
DATA
DATA
8 bits
8 bits
ACK
1b
1b
1b
///
///
P
P
P
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