MAX1996AETI+ Maxim Integrated Products, MAX1996AETI+ Datasheet - Page 13

no-image

MAX1996AETI+

Manufacturer Part Number
MAX1996AETI+
Description
Display Drivers CCFL Backlight Controller
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1996AETI+

Lead Free Status / Rohs Status
 Details
loop then slowly corrects the lamp current by increasing
V
Table 1 describes the functionality of SH/SUS, CRF/
SDA, and CTL/SCL in each of the MAX1996A’s three
interface modes. The MAX1996A features both an
SMBus digital interface and an analog interface. Note
that the MODE signal can also synchronize the DPWM
frequency. (See Synchronizing the DPWM Frequency.)
The brightness is controlled by either the Analog Interface
(see the Analog Interface section) or the SMBus Interface
(see the SMBus Interface section). The brightness of the
CCFL is adjusted in the following three ways:
1) Lamp-current control, where the magnitude of the
2) DPWM control, where the average lamp current is
3) The combination of the first two methods.
In each of the three methods, a 5-bit brightness code is
generated from the selected interface and is used to
set the lamp current and/or DPWM duty cycle.
The 5-bit brightness code defines the lamp current
level with 00000\b representing minimum lamp current
and 11111\b representing maximum lamp current. The
average lamp current is measured across an external
sense resistor (see the Current-Sense Resistor section).
The voltage on the sense resistor is measured at IFB.
The brightness code adjusts the regulation voltage at
IFB (V
where V
mum average is set by the following formula:
which is between 387.5mV and 400mV.
If V
47.7mV/R1 RMS lamp current) for greater than 1s, the
Table 1. Interface Modes
CCI,
SH/SUS
CRF/SDA
CTL/SCL
IFB
average lamp current is adjusted.
pulsed to the set level with a variable duty cycle.
which brings the circuit back into regulation.
PIN
IFB
does not exceed 150mV peak (which is about
V
MINDAC
IFB
). The minimum average V
= V
REF
varies between 0 to 2V, and the maxi-
MODE = V
SMBus suspend
SMBus data I/O
SMBus clock input
______________________________________________________________________________________
DIGITAL INTERFACE
31 / 160 + V
CC
Interface Selection
MINDAC
Range, CCFL Backlight Controller
Dimming Range
High-Efficiency, Wide Brightness
IFB
is V
/ 160,
MODE = REF
V
Reference input for minimum brightness
CTL/SCL
MINDAC
Analog control input to set brightness (range from 0 to CRF/SDA)
= 0 = maximum brightness
/5,
MAX1996A assumes a lamp-out condition and shuts
down (see the Lamp-Out Detection section).
The equation relating brightness code to IFB regulation
voltage is:
where n is the brightness code.
To always use maximum average lamp current when
using DPWM control, set V
DPWM control is similar to lamp-current control in that it
also responds to the 5-bit brightness code. A bright-
ness code of 00000\b corresponds to a 9% DPWM duty
cycle and a brightness code of 11111\b corresponds to
a 100% DPWM duty cycle. The duty cycle changes by
3.125% per step, but codes 00000\b to 00011\b all pro-
duce 9% (Figure 5).
To disable DPWM and always use 100% duty cycle, set
V
equations shown above should assume V
instead of V
DAC’s functionality and Table 3 shows some typical
settings for the brightness adjustment.
In normal operation, V
V
trol and DPWM control to vary the lamp brightness
(Figure 6). In this mode, lamp-current control regulates
the average lamp current during a DPWM on-cycle.
The MAX1996A’s analog interface uses an internal ADC
with 1-bit hysteresis to generate the brightness code
used to dim the lamp (see the Dimming Range section).
CTL/SCL is the ADC’s input and CRF/SDA is its refer-
ence voltage. The ADC can operate in either positive-
scale ADC mode or negative-scale ADC mode. In
positive-scale ADC mode, the brightness code increas-
es from 0 to 31 as V
In negative-scale mode, the brightness scale decreases
from 31 to zero as V
MINDAC
REF
V
Logic level shutdown control input
IFB
and the MAX1996A uses both lamp-current con-
Analog Interface and Brightness Code
= V
ANALOG INTERFACE
to V
REF
MINDAC
CC
. Note that with DPWM disabled, the
n / 160 + V
CTL
CTL
MODE = GND
V
Reference input for maximum
brightness
= V
CTL/SCL
MINDAC
increases from zero to V
increases from zero to V
CC
MINDAC
. Table 2 describes MIN-
MINDAC
= 0 = minimum brightness
is set between zero and
to V
REF
(32 - n) / 160
.
MINDAC
CRF
CRF
.
.
= 0
13

Related parts for MAX1996AETI+