MT46H8M32LFB5-75 IT:A Micron Technology Inc, MT46H8M32LFB5-75 IT:A Datasheet - Page 61
MT46H8M32LFB5-75 IT:A
Manufacturer Part Number
MT46H8M32LFB5-75 IT:A
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H8M32LFB5-75_ITA.pdf
(96 pages)
Specifications of MT46H8M32LFB5-75 IT:A
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Figure 24: Nonconsecutive READ Bursts
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Command
Command
Address
Address
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
Notes:
READ
Bank,
READ
Bank,
Col n
Col n
T0
T0
1. D
2. BL = 4, 8, or 16 (if burst is 8 or 16, the second burst interrupts the first).
3. Shown with nominal
4. Example applies when READ commands are issued to different devices or nonconsecu-
tive READs.
OUT
CL = 2
NOP
NOP
T1
T1
n (or b) = data-out from column n (or column b).
CL = 3
T1n
T1n
D
OUT
NOP
NOP
T2
T2
1
t
AC,
D
OUT
T2n
T2n
61
t
DQSCK, and
D
256Mb: x16, x32 Mobile LPDDR SDRAM
D
OUT
READ
Bank,
READ
Bank,
Col b
Col b
OUT
T3
T3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
D
D
T3n
T3n
t
OUT
DQSQ.
OUT
CL = 2
D
T4
T4
NOP
NOP
OUT
Don’t Care
CL = 3
D
T4n
T4n
OUT
©2008 Micron Technology, Inc. All rights reserved.
T5
T5
NOP
NOP
D
OUT
READ Operation
Transitioning Data
T5n
T5n
D
OUT
T6
T6
NOP
NOP
D
D
OUT
OUT
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