PIC16C72A-04/SO Microchip Technology Inc., PIC16C72A-04/SO Datasheet - Page 8

• Manufacturer Part Number: PIC16C72A-04/SO
• Description: 28 PIN, 3.5 KB OTP, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C72A-04/SO

• A/d Inputs: 5-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 22
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 28-pin SOIC
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 4 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C62B/72A
2.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers and the
Special Function Registers. Bits RP1 and RP0 are the
bank select bits.
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain Special
Function Registers. Some “high use” Special Function
Registers from one bank may be mirrored in another
bank for code reduction and quicker access.
2.2.1
The register file can be accessed either directly, or indi-
rectly
(Section 2.5).
DS35008B-page 8
Note 1: Maintain this bit clear to ensure upward compati-
RP1
= 00
= 01
= 10
= 11
(1)
through
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
RP0
Bank0
Bank1
Bank2 (not implemented)
Bank3 (not implemented)
bility with future products.
the
(STATUS<6:5>)
File
Select
Register
FSR
Preliminary
FIGURE 2-2:
Note 1: Not a physical register.
Address
File
2: These registers are not implemented on the
0Ah
0Bh
0Ch
0Dh
0Eh
1Ah
1Bh
1Ch
1Dh
1Eh
0Fh
1Fh
7Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
20h
read as ’0’.
Unimplemented data memory locations,
PIC16C62B, read as ’0’.
ADCON0
CCP1CON
ADRES
SSPCON
CCPR1H
Registers
SSPBUF
CCPR1L
PCLATH
INTCON
STATUS
Purpose
TMR1H
General
INDF
PORTA
PORTB
PORTC
T1CON
T2CON
TMR1L
Bank 0
TMR0
TMR2
PIR1
REGISTER FILE MAP
PCL
FSR
—
—
—
—
—
—
—
—
—
(1)
(2)
(2)
1999 Microchip Technology Inc.
OPTION_REG 81h
ADCON1
SSPSTAT
Registers
SSPADD
PCLATH
INTCON
STATUS
Purpose
General
INDF
Bank 1
TRISA
TRISB
TRISC
PCON
PIE1
PCL
FSR
PR2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(2)
80h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
BFh
C0h
FFh
Address
File