M471B5773DH0-YK0 Samsung Semiconductor, M471B5773DH0-YK0 Datasheet - Page 25

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M471B5773DH0-YK0

Manufacturer Part Number
M471B5773DH0-YK0
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M471B5773DH0-YK0

Lead Free Status / Rohs Status
Supplier Unconfirmed
Unbuffered SODIMM
15. Electrical Characteristics and AC timing
15.1 Refresh Parameters by Device Density
NOTE :
1. Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options or requirements referred to in
15.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
15.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
[ Table 16 ] DDR3-800 Speed Bins
All Bank Refresh to active/refresh cmd time
Average periodic refresh interval
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 5
CL = 6
Supported CL Settings
Supported CWL Settings
this material.
[0 °C<T
Bin (CL - tRCD - tRP)
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
Parameter
Speed
CASE
tRCD
tRRD
tFAW
tRAS
tRP
tRC
CL
Parameter
Parameter
≤95 °C, V
CL-nRCD-nRP
Speed
DDQ
CWL = 5
CWL = 5
= 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V); V
DDR3-800
6-6-6
37.5
52.5
min
15
15
10
40
6
tREFI
tCK(AVG)
tCK(AVG)
Symbol
tRCD
tRAS
datasheet
85 °C < T
tRP
tRC
tAA
0 °C ≤ T
Symbol
DDR3-1066
tRFC
13.13
13.13
50.63
7-7-7
37.5
37.5
min
7.5
7
CASE
CASE
≤ 85°C
≤ 95°C
- 26 -
52.5
37.5
min
3.0
2.5
15
15
15
DDR3-1333
1Gb
9-9-9
110
7.8
3.9
13.5
13.5
49.5
min
6.0
36
30
9
DDR3-800
6 - 6 - 6
5,6
DD
5
= 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)]
2Gb
160
7.8
3.9
9*tREFI
DDR3-1600
max
3.3
3.3
20
11-11-11
-
-
-
13.75
13.75
48.75
min
6.0
11
35
30
4Gb
300
7.8
3.9
DDR3L SDRAM
8Gb
350
7.8
3.9
Units
Units
nCK
nCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
µs
µs
1,2,3,4,9,10
NOTE
NOTE
Rev. 1.0
1,2,3
NOTE
1

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