M471B5773DH0-YK0 Samsung Semiconductor, M471B5773DH0-YK0 Datasheet - Page 14

• Manufacturer Part Number: M471B5773DH0-YK0
• Manufacturer: Samsung Semiconductor

Specifications of M471B5773DH0-YK0

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Unbuffered SODIMM
10.3 AC and DC Logic Input Levels for Differential Signals
10.3.1 Differential Signals Definition
10.3.2 Differential Swing Requirement for Clock (CK - CK) and Strobe (DQS - DQS)
NOTE :
1. Used to define a differential signal slew-rate.
2. for CK - CK use V
3. These values are not defined, however they single-ended signals CK, CK, DQS, DQS need to be within the respective limits (V
then the reduced level applies also here.
V
V
nals as well as the limitations for overshoot and undershoot. Refer to "overshoot and Undersheet Specification"
Symbol
IHdiff
ILdiff
V
V
IHdiff
ILdiff
(AC)
(AC)
differential input high ac
differential input low ac
IH
differential input high
differential input low
/V
IL
(AC) of ADD/CMD and V
Parameter
Figure 2. Definition of differential ac-swing and "time above ac level" tDVAC
V
V
IL
IH
.DIFF.AC.MAX
2 x (V
.DIFF.AC.MIN
V
V
REFCA
IL
IH
.DIFF.MAX
.DIFF.MIN
NOTE 3
NOTE 3
IH
; for DQS - DQS use V
+0.18
(AC) - V
min
0.0
datasheet
REF
1.35V
)
2 x (V
IH
half cycle
/V
NOTE 3
NOTE 3
IL
IL
-0.18
DDR3-800/1066/1333/1600
max
(AC) - V
(AC) of DQs and V
- 15 -
tDVAC
REF
)
2 x (V
REFDQ
NOTE 3
NOTE 3
IH
; if a reduced ac-high or ac-low level is used for a signal group,
+0.20
min
(AC) - V
tDVAC
REF
1.5V
)
IH
2 x (V
(DC) max, V
time
NOTE 3
NOTE 3
IL
DDR3L SDRAM
-0.20
max
(AC) - V
IL
(DC)min) for single-ended sig-
REF
)
unit
V
V
V
V
Rev. 1.0
NOTE
1
1
2
2