MAX97236EVKIT+ Maxim Integrated Products, MAX97236EVKIT+ Datasheet - Page 24

• Manufacturer Part Number: MAX97236EVKIT+
• Description: Audio Modules & Development Tools MAX97236 Eval Kit
• Manufacturer: Maxim Integrated Products

Specifications of MAX97236EVKIT+

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The Keyscan ADC Clock Divider register sets the clock frequency that is used for the conversion clock for the keyscan
6-bit ADC.
The Keyscan Debounce register controls the debounce time when a keypress is detected. See
Audio Amplifier with Jack Detection
24
The Keyscan Clock Divider register sets the clock frequency that is used for the conversion clock for the keyscan 1kHz
generator.
Table 9. Keyscan Clock Divider Registers
Table 10. Keyscan ADC Clock Divider Registers
Table 11. Keyscan Clock Divider Registers
Clock Divider
Clock Divider
REGISTER
REGISTER
REGISTER
0x12/0x13
Debounce
Keyscan
Keyscan
Keyscan
0x14
0x15
ADC
1/2
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
KEY_DIV_HIGH/
KEY_DIV_LOW
KEY_DIV_ADC
KEY_DEB
NAME
NAME
NAME
Keyscan Debounce Register
Debounce time set from 1ms to 256ms in 1ms increments. The programmed
code plus one represents the debounce time directly.
e.g., code 0x13 represents 20ms of debounce.
Keyscan ADC Clock Divider
The keyscan ADC clock is generated by dividing down the frequency of
EXTCLK. The divider is set with the 8 bits contained within register 0x14.
Since 100kHz (10Fs) is desired, then:
For the low input frequencies, resolution is about 20%.
Keyscan Clock Divider
The keyscan 1kHz clock is generated by dividing down the frequency of
EXTCLK. The divider is set with the 16 bits contained within registers 0x12
and 0x13, where 0x12 is the high byte and 0x13 is the low byte.
Since 1kHz (1ms) is desired, then:
For the low input frequencies, resolution is about 0.2%.
t
DEB
N = f
e.g., f
e.g., f
e.g., f
N = f
e.g., f
e.g., f
e.g., f
= KEY_DEB + 1
IN
IN
IN
IN
IN
IN
IN
IN
/200kHz
/2kHz
= 20MHz, then N = 100
= 1MHz, then N = 5
= 19.2MHz, then N = 96
= 20MHz, then N = 10,000
= 1MHz, then N = 500
= 19.2MHz, then N = 9600
DESCRIPTION
DESCRIPTION
DESCRIPTION
Keyscan Clock Divider Registers
Keyscan Divider ADC Register
Keyscan Debounce Register
Figure
6.