PSB3186FV14XT Infineon Technologies, PSB3186FV14XT Datasheet - Page 115
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PSB3186FV14XT
Manufacturer Part Number
PSB3186FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV14XT.pdf
(200 pages)
Specifications of PSB3186FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Figure 64
The following description gives an example for the transmission of a 76 byte frame with
a selected block size of 32 byte:
• The host writes 32 bytes to the XFIFOD, issues an XTF command and waits for an
• The ISAC-SX TE immediately issues an XPR interrupt (as remaining XFIFOD space
• Due to the XPR interrupt the host writes the next 32 bytes to the XFIFOD, followed by
• As soon as the last byte of the first block is transmitted, the ISAC-SX TE releases an
• The host writes the remaining 12 bytes of the frame to the XFIFOD and issues the XTF
• After the last byte of the frame has been transmitted the ISAC-SX TE releases an XPR
Data Sheet
XPR interrupt in order to continue with entering data.
is not used) and starts transmission.
the XTF command, and waits for XPR.
XPR (XFIFOD space of first data block is free again) and continues transmitting the
second block.
command together with XME to indicate that this is the end of frame.
interrupt and the host may proceed with transmission of a new frame.
Data Transmission Procedure
Command
XTF
N
N
Write one
data block
to XFIFO
Command
XTF+XME
115
Pool Ready
Message
Transmit
START
End of
XPR
End
?
?
Y
Y
Description of Functional Blocks
21150_25
ISAC-SX TE
PSB 3186
2003-01-30
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