PSB3186HV14XP Lantiq, PSB3186HV14XP Datasheet - Page 21
![](/photos/31/31/313132/64pin_mqfp_sml.jpg)
PSB3186HV14XP
Manufacturer Part Number
PSB3186HV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PSB3186HV14XP.pdf
(200 pages)
Specifications of PSB3186HV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
- Current page: 21 of 200
- Download datasheet (4Mb)
Table 2
Pin No.
MQFP-64
TQFP-64
15
16
39
40
Data Sheet
Symbol
AD6
SDR
AD7
SDX
RD
DS
WR
R/W
ISAC-SX TE Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
Open Drain
(OD)
I/O
I
I/O
OD
I
I
I
I
Function
• Multiplexed Bus Mode:
Address/data bus
Address/data line AD6 if the parallel interface is
selected.
• Non-Multiplexed Bus Mode:
Data bus
Data line D6 if the parallel interface is selected.
SCI - Serial Data Receive
Receive data line of the SCI interface if a serial
interface is selected.
• Multiplexed Bus Mode:
Address/data bus
Address/data line AD7 if the parallel interface is
selected.
• Non-Multiplexed Bus Mode:
Data bus
Data line D7 if the parallel interface is selected.
SCI - Serial Data Transmit
Transmit data line of the SCI interface if a serial
interface is selected.
Read
Indicates a read access to the registers (Siemens/
Intel bus mode).
Data Strobe
The rising edge marks the end of a valid read or
write operation (Motorola bus mode).
Write
Indicates a write access to the registers (Siemens/
Intel bus mode).
Read/Write
A HIGH identifies a valid host access as a read
operation and a LOW identifies a valid host access
as a write operation (Motorola bus mode).
21
Pin Configuration
ISAC-SX TE
PSB 3186
2003-01-30
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