PEF24901HV22XP Lantiq, PEF24901HV22XP Datasheet - Page 85

• Manufacturer Part Number: PEF24901HV22XP
• Manufacturer: Lantiq

Specifications of PEF24901HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Boundary Scan
Number
TDI ––>
1)
TAP Controller
The Test Access Port (TAP) controller implements the state machine defined in the
JTAG standard IEEE 1149.1. Transitions on the pin TMS cause the TAP controller to
perform a state change. Before operation the TAP controller has to be reset by TRST.
According to the IEEE 1149 standard 7 instructions are executable. The instructions
’CLAMP’ and ’HIGHZ’ were added. Instruction ’SSP’ is no more supported since its
function is identical to that of the SSP pin.
Table 18
Code
0000
0001
0010
Data Sheet
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
42.
43.
44.
45.
46.
47.
In the BDSL file, pin 60 is named RESQ.
Instruction
EXTEST
INTEST
SAMPLE/PRELOAD
TAP Controller Instructions
Pin Number
16
15
14
12
11
10
8
7
5
4
21
20
19
18
17
13
Pin Name
ST21
CLS1
ST30
ST31
SDX
N.C.
(former MTO)
DOUT
DIN
FSC
DCL
PDM0
PDM1
PDM2
PDM3
SDR
CL15
Function
External testing
Snap-shot testing
Internal testing
86
Type
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I
I
I
I
I
I
I
I
Operational Description
Number of
Scan Cells
3
3
3
3
3
1
3
1
1
1
1
1
1
1
1
1
PEF 24901
2002-09-30
DFE-T