SC403MLTRT Semtech, SC403MLTRT Datasheet - Page 21

• Manufacturer Part Number: SC403MLTRT
• Manufacturer: Semtech

Specifications of SC403MLTRT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Applications Information (continued)
Figure 10 shows the ENL voltage thresholds and their
effect on LDO and switcher operation.
Before start-up, the LDO checks the status of the following
signals to ensure proper operation can be maintained.
1.
2.
When the ENL pin is high and V
the LDO will begin start-up. During the initial phase, when
the V
than 0.75V, the LDO initiates a current-limited start-up
(typically 65mA) to charge the output capacitors while
protecting from a short circuit event. When V
than 0.75V but still less than 90% of its final value (as
sensed at the FBL pin), the LDO current limit is increased
to ~115mA. When V
(as sensed at the FBL pin), the LDO current limit is increased
to ~200mA and the LDO output is quickly driven to the
nominal value by the internal LDO regulator. It is recom-
mended that during LDO start-up to hold the PWM
switching off until the LDO has reached 90% of the final
value. This prevents overloading the current-limited LDO
output during the LDO start-up.
Due to the initial current limitations on the LDO during
power up (Figure 11), any external load attached to the
VDD pin must be limited to 20mA before the LDO has
reached 90% of it final regulation value.
ENL pin
V
2.6V
2.4V
ENL low
threshold
(min 0.4V)
AGND
IN
DD
input voltage
voltage (which is the LDO output voltage) is less
Figure 10 — ENL Threshold
ENL voltage
DD
has reached 90% of the final value
LDO on
Switcher on if EN = high
LDO on
Switcher off by V
LDO off
Switcher on if EN = high
V
IN
IN
is above the UVLO point,
UVLO hysteresis
IN
UVLO
DD
is greater
LDO Switch-Over Operation
The switch-over function is provided to increase efficiency
by using the more efficient DC-DC converter to power the
LDO output, avoiding the less efficient LDO regulator
when possible. The switch-over function connects the
VDD pin directly to the VOUT pin using an internal switch.
When the switch-over is complete the LDO is turned off,
which results in power savings and maximizes efficiency.
If the LDO output is used to bias the SC403, then after
switch-over the device is self-powered from the switching
regulator with the LDO turned off.
The switch-over logic waits for 32 switching cycles before
it starts the switch-over. When the LDO is already in regu-
lation and the DC-DC converter is later enabled, as soon as
the PGOOD output goes high, the 32 cycles are started.
The voltages at the VDD and VOUT pins are then com-
pared; if the two voltages are within ±300mV of each
other, the VDD pin connects to the VOUT pin using an
internal switch, and the LDO is turned off.
Switch-over Limitations on VOUT, ENL, and VDD
Because the internal switch-over circuit always compares
the VOUT and VDD pins at start-up, there are limitations
on permissible combinations of these pins. Consider the
case where V
grammed to 3.3V. After start-up, the device would connect
VOUT to VDD and disable the LDO, since the two voltages
are within the ±300mV switch-over window. To avoid
unwanted switch-over, the minimum difference between
the voltages for V
V
V
VLDO
VLDO
90% of
Final
Final
0.7V
OUT
Figure 11 — LDO Start-Up
is programmed to 3.0V and V
OUT
and V
Short-circuit Protection @ ~ 65mA
LDO
should be ±500mV.
startup @ ~ 115mA
Constant current
Voltage regulating
with ~ 200mA
current limit
LDO
is pro-
21