HS1-3182-9+ Intersil, HS1-3182-9+ Datasheet

HS1-3182-9+

Manufacturer Part Number

HS1-3182-9+

Description

IC LN-DRVR ARINC 429 16-SBDIP

Manufacturer

Intersil

Type

Line Driver, Transmitterr

Datasheet

1.HS1-3182-9.pdf (7 pages)

Specifications of HS1-3182-9+

Number Of Drivers/receivers

2/0

Voltage - Supply

13.5 V ~ 16.5 V

Mounting Type

Through Hole

Package / Case

16-CDIP (0.300", 7.62mm)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Protocol

Current page: 1 of 7
Download datasheet (197Kb)

ARINC 429 Bus Interface Line Driver

Circuit

The HS-3182 is a monolithic dielectric ally isolated bipolar

differential line driver designed to meet the specifications of

ARINC 429. This device is intended to be used with a

companion chip, HS-3282 CMOS ARINC Bus Interface

Circuit, which provides the data formatting and processor

interface function.

All logic inputs are TTL and CMOS compatible. In addition to

the DATA (A) and DATA (B) inputs, there are also inputs for

CLOCK and SYNC signals which are AND’d with the DATA

inputs. This feature enhances system performance and

allows the HS-3182 to be used with devices other than the

HS-3182.

Three power supplies are necessary to operate the HS-3182:

+V = +15V ±10%, -V = -15V ±10%, and V1 = 5V ±5%. V

used to program the differential output voltage swing such that

separate power supply may be used for VREF which should

not exceed 6V.

The driver output impedance is 75Ω ±20% at +25°C. Driver

output rise and fall times are independently programmed

through the use of two external capacitors connected to the CA

and CB inputs. Typical capacitor values are CA = CB = 75pF for

high-speed operation (100kBPS), and CA = CB = 300pF for

low-speed operation (12kBPS to 14.5kBPS). The outputs are

protected against overvoltage and short circuit as shown in the

Block Diagram. The HS-3182 is designed to operate over an

ambient temperature range of -55°C to +125°C, or -40°C to

+85°C.

SYNC CLK DATA (A) DATA (B) A

OUT

(DIFF) = ±2VREF. Typically, V

TABLE 1. TRUTH TABLE

-V

OUT

REF

Data Sheet

= V1 = 5V ±5%, but a

-V

OUT

REF

COMMENTS

High

Null

Low

Null

REF

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• RoHS/Pb-free Available for SBDIP Package (100% Gold

• TTL and CMOS Compatible Inputs

• Adjustable Rise and Fall Times via Two External

• Programmable Output Differential Voltage via V

• Operates at Data Rates Up to 100k Bits/s

• Output Short Circuit Proof and Contains Overvoltage

• Outputs are Inhibited (0V) If DATA (A) and DATA (B)

• DATA (A) and DATA (B) Signals are “AND’d” with Clock

• Full Military Temperature Range

Pinouts

Termination Finish)

Capacitors

Protection

Inputs are Both in the “Logic One” State

and Sync Signals

DATA (A)

All other trademarks mentioned are the property of their respective owners.

May 30, 2008

Intersil (and design) is a registered trademark of Intersil Americas Inc.

DATA (A)

SYNC

GND

OUT

REF

12 13

-V

(16 LD SBDIP)

(28 LD CLCC)

TOP VIEW

14 15 16 17 18

HS-3182

28 27 26

CLK

DATA (B)

OUT

HS-3182

CLK

DATA (B)

FN2963.3

REF

Input

Related parts for HS1-3182-9+

HS1-3182-9+ Summary of contents

Page 1

... LD SBDIP) TOP VIEW REF GND SYNC CLK 13 4 DATA (A) DATA ( OUT OUT GND +V HS-3182 (28 LD CLCC) TOP VIEW CLK DATA ( Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1997, 2007, 2008. All Rights Reserved Input REF ...

Page 2

... NOTE: The rise and fall time of the outputs are set to ARINC specified values by C low speed operation. The output HI and low levels are set to ARINC specifications HS-3182 PART TEMP. MARKING RANGE (°C) HS1-3182-8 RD -55 to +125 HS1-3182-9+ RD -40 to +85 HS4- 3182-8 RD -55 to +125 (9) ( OUTPUT DRIVER LEVEL SHIFTER AND SLOPE ...

Page 3

... HS-3182 Thermal Information Thermal Resistance (Typical) SBDIP Package . . . . . . . . . . . . . . . . . . CLCC Package . . . . . . . . . . . . . . . . . . Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Die Characteristics Number of Transistors or Gates . . . . . . . . . . . . . . . . . . . . . . . . . 133 CONDITIONS SYMBOL (Note 5) I (+V) No Load (0k to 100k bits/s) ...

Page 4

AC Electrical Specifications AC PARAMETER Rise Time ( OUT OUT Fall Time ( OUT OUT Propagation Delay Input to Output Propagation Delay Input to Output NOTES +15V -15V, V ...

Page 5

Driver Waveforms 50% DATA (A) 0V DATA ( REF A 0V OUT ADJ PHL B 0V OUT 50% -V REF OUT OUT DIFFERENTIAL 0V OUTPUT NOTES: t measured 50% to 90% x ...

Page 6

Ceramic Leadless Chip Carrier Packages (CLCC) 0.010 -E- 0.007 -H- - ...

Page 7

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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