ECOG1X5A5L CYAN, ECOG1X5A5L Datasheet - Page 67

• Manufacturer Part Number: ECOG1X5A5L
• Description: MCU, 16BIT, 512K FLASH, USB, 68QFN
• Manufacturer: CYAN

Specifications of ECOG1X5A5L

• Core Size: 16bit
• No. Of I/o's: 32
• Program Memory Size: 512KB
• Ram Memory Size: 24KB
• Cpu Speed: 70MHz
• Oscillator Type: External, Internal
• No. Of Timers: 5
• No. Of Pwm Channels: 2
• Rohs Compliant: Yes
• Controller Family/series: ECOG1X

11 February 2010
Symbol
Symbol
EHI_D0..D16/D32
EHI_D0..D16/D32
T
t
t
t
t
t
t
N
N
t
t
CPU
DH
R1
R2
R3
DV
DS
A1
A2
DMA Mode
The tables below for the EHI function in DMA mode use the following symbols for time periods defined
by bit fields in the EHI registers.
DMA Mode - eCOG1X as master
1
2
EHI_REQ
EHI_REQ
EHI_ACK
EHI_ACK
Description
CPU clock period
EHI_ACK output active period (0..3)
EHI_ACK output inactive period (0..3)
Parameter
Delay time EHI_REQ active to EHI_ACK active
Delay time EHI_ACK active to
EHI_REQ inactive
Minimum EHI_REQ input inactive width
Minimum EHI_ACK output active width
Minimum EHI_ACK output inactive width
Delay time data output valid to EHI_ACK output active
Setup time data input valid to EHI_ACK output inactive
Hold time EHI_ACK output inactive to data input invalid
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
t
t
R1
R1
Figure 17: EHI DMA master write cycle timing diagram
Figure 16: EHI DMA master read cycle timing diagram
Table 34: AC characteristics - EHI DMA master mode
t
DV
t
t
R2
R2
eCOG1X Microcontroller Product Family
data(n)
t
t
A1
A1
t
DS
data(n)
Table 33: EHI clock symbols
www.cyantechnology.com
Continue next transfer (min)
Pause next transfer (max)
t
DH
t
t
R3
R3
t
t
A2
A2
Definition
fd.ehi.cfg.dma_ack_act_prd1
fd.ehi.cfg.dma_ack_act_prd2
t
DV
data(n+1)
data(n+1)
t
t
A1
A1
(2 x T
T
T
t
DS
CPU
CPU
(T
CPU
Min
–3
13
CPU
x (N
x (N
0
0
0
t
DH
x (N
) + 3
1
2
+ 1)
+ 1)
1
+ N
2
)) – 20
Max
+3
Version 1.17
From Ext. Host
From eCOG1
From eCOG1
From Ext. Host
From eCOG1
From Ext. Host
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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