ISP1506ABS-T ST-Ericsson Inc, ISP1506ABS-T Datasheet - Page 44

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ISP1506ABS-T

Manufacturer Part Number
ISP1506ABS-T
Description
IC USB TXRX HS 24-HVQFN
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet

Specifications of ISP1506ABS-T

Number Of Drivers/receivers
1/1
Protocol
USB 2.0
Voltage - Supply
1.65 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
10. Register map
Table 18.
[1]
[2]
[3]
[4]
Table 19.
[1]
[2]
[3]
[4]
ISP1506A_ISP1506B_1
Product data sheet
Field name
Vendor ID Low register
Vendor ID High register
Product ID Low register
Product ID High register
Function Control register
Interface Control register
OTG Control register
USB Interrupt Enable Rising Edge
register
USB Interrupt Enable Falling Edge
register
USB Interrupt Status register
USB Interrupt Latch register
Debug register
Scratch register
Reserved (do not use)
Access extended register set
Vendor-specific register
Power Control register
Field name
Maps to immediate register set above
Reserved (do not use)
Read (R): A register can be read. Read-only if this is the only mode given.
Write (W): The pattern on the data bus will be written over all bits of a register.
Set (S): The pattern on the data bus is OR-ed with and written to a register.
Clear (C): The pattern on the data bus is a mask. If a bit in the mask is set, then the corresponding register bit will be set to zero
(cleared).
Read (R): A register can be read. Read-only if this is the only mode given.
Write (W): The pattern on the data bus will be written over all bits of a register.
Set (S): The pattern on the data bus is OR-ed with and written to a register.
Clear (C): The pattern on the data bus is a mask. If a bit in the mask is set, then the corresponding register bit will be set to zero
(cleared).
Immediate register set overview
Extended register set overview
Size
(bits)
8
8
8
8
8
8
8
8
8
8
8
8
8
-
8
8
8
Size
(bits)
8
8
R
00h
01h
02h
03h
04h to 06h
07h to 09h
0Ah to 0Ch 0Ah
0Dh to 0Fh 0Dh
10h to 12h
13h
14h
15h
16h to 18h
-
[1]
R
[1]
Rev. 01 — 30 May 2007
W
-
-
-
-
04h
07h
10h
-
-
-
16h
2Fh
Address (6 bits)
W
[2]
Address (6 bits)
[2]
30h to 3Ch
3Dh to 3Fh
19h to 2Eh
40h to FFh
00h to 3Fh
S
-
-
-
-
05h
08h
0Bh
0Eh
11h
-
-
-
17h
-
S
[3]
ISP1506A; ISP1506B
[3]
C
-
-
-
-
06h
09h
0Ch
0Fh
12h
-
-
-
18h
-
C
[4]
[4]
ULPI HS USB OTG transceiver
References
Section 10.1.1 on page 45
Section 10.1.2 on page 45
Section 10.1.3 on page 46
Section 10.1.4 on page 47
Section 10.1.5 on page 48
Section 10.1.6 on page 49
Section 10.1.7 on page 49
Section 10.1.8 on page 50
Section 10.1.9 on page 51
Section 10.1.10 on page 51
Section 10.1.11 on page 51
Section 10.1.12 on page 51
Section 10.1.13 on page 51
Section 10.1.14 on page 51
References
Section 10.2 on page 52
© NXP B.V. 2007. All rights reserved.
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