PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 28

• Manufacturer Part Number: PIC16F887-I/PT
• Description: MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-I/PT

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TFQP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
TABLE 2-1:
DS41291D-page 26
Addr
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
1:
2:
3:
4:
Name
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
MCLR and WDT Reset do not affect the previous value data latch. The RBIF bit will be cleared upon Reset but will set again if the
mismatch exists.
When SSPCON register bits SSPM<3:0> = 1001, any reads or writes to the SSPADD SFR address are accessed through the SSPMSK
register. See Registers • and 13-4 for more detail.
Port pins with analog functions controlled by the ANSEL and ANSELH registers will read ‘0’ immediately after a Reset even though the
data latches are either undefined (POR) or unchanged (other Resets).
PIC16F884/PIC16F887 only.
(3)
(3)
(3)
(3,4)
(3)
(2)
PIC16F882/883/884/886/887 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register 1 Low Byte (LSB)
Capture/Compare/PWM Register 1 High Byte (MSB)
EUSART Transmit Data Register
EUSART Receive Data Register
Capture/Compare/PWM Register 2 Low Byte (LSB)
Capture/Compare/PWM Register 2 High Byte (MSB)
A/D Result Register High Byte
T1GINV
ADCS1
OSFIF
WCOL
SPEN
P1M1
Bit 7
RA7
RB7
RC7
RD7
IRP
GIE
—
—
—
—
—
TOUTPS3 TOUTPS2
TMR1GE
SSPOV
ADCS0
P1M0
Bit 6
PEIE
ADIF
RC6
RD6
C2IF
RP1
RA6
RB6
RX9
—
—
—
T1CKPS1
SSPEN
DC1B1
DC2B1
SREN
CHS3
RCIF
Bit 5
T0IE
C1IF
RP0
RA5
RB5
RC5
RD5
—
—
Write Buffer for upper 5 bits of Program Counter
TOUTPS1
T1CKPS0
DC1B0
DC2B0
CREN
CHS2
Bit 4
INTE
TXIF
EEIF
RC4
RD4
CKP
RA4
RB4
Preliminary
TO
—
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
ADDEN
SSPM3
SSPIF
BCLIF
CHS1
RBIE
Bit 3
RA3
RB3
RC3
RD3
RE3
PD
ULPWUIF
TMR2ON
T1SYNC
CCP1M2
CCP2M2
CCP1IF
SSPM2
RE2
FERR
CHS0
Bit 2
T0IF
RA2
RB2
RC2
RD2
Z
(4)
GO/DONE
T2CKPS1 T2CKPS0
TMR1CS
CCP1M1
CCP2M1
TMR2IF
SSPM1
RE1
OERR
Bit 1
INTF
RA1
RB1
RC1
RD1
DC
—
(4)
© 2007 Microchip Technology Inc.
TMR1ON
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
RBIF
RE0
ADON
RX9D
Bit 0
RA0
RB0
RC0
RD0
C
(4)
(1)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
---0 0000
0000 000x
-000 0000
0000 00-0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
0000 0000
POR, BOR
Value on
179,213
177,213
126,213
126,213
124,213
159,213
151,213
156,213
126,213
126,214
125,214
104,214
37,213
73,213
37,213
29,213
37,213
39,213
48,213
53,213
57,213
59,213
37,213
31,213
34,213
35,213
76,213
76,213
79,213
81,213
82,213
99,214
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