PIC16F1827-I/ML Microchip Technology Inc., PIC16F1827-I/ML Datasheet - Page 337
PIC16F1827-I/ML
Manufacturer Part Number
PIC16F1827-I/ML
Description
28 QFN 6x6mm TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-I/ML
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin QFN
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
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RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Rotate Right f through Carry
[ label ]
0 f 127
d [0,1]
See description below
C
The contents of register ‘f’ are rotated
one bit to the right through the Carry
flag. If ‘d’ is ‘0’, the result is placed in
the W register. If ‘d’ is ‘1’, the result is
placed back in register ‘f’.
Enter Sleep mode
[ label ]
None
00h WDT,
0 WDT prescaler,
1 TO,
0 PD
TO, PD
The power-down Status bit, PD is
cleared. Time-out Status bit, TO is
set. Watchdog Timer and its pres-
caler are cleared.
The processor is put into Sleep mode
with the oscillator stopped.
C
RRF f,d
SLEEP
Register f
SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBWFB
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16(L)F1826/27
Subtract W from f
[ label ]
0 f 127
d [0,1]
(f) - (W) destination)
C, DC, Z
Subtract (2’s complement method) W
register from register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f.
Subtract W from literal
[ label ]
0 k 255
k - (W) W)
C, DC, Z
The W register is subtracted (2’s com-
plement method) from the eight-bit
literal ‘k’. The result is placed in the W
register.
C = 0
C = 1
DC = 0
DC = 1
C = 0
C = 1
DC = 0
DC = 1
SUBWFB
0 f 127
d [0,1]
(f) – (W) – (B) dest
C, DC, Z
Subtract W and the BORROW flag
(CARRY) from register ‘f’ (2’s comple-
ment method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Subtract W from f with Borrow
SUBWF f,d
SUBLW k
W f
W f
W<3:0> f<3:0>
W<3:0> f<3:0>
W k
W k
W<3:0> k<3:0>
W<3:0> k<3:0>
f {,d}
DS41391D-page 337
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