PIC16F1933-I/SO Microchip Technology Inc., PIC16F1933-I/SO Datasheet - Page 84
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1933-I/SO
Manufacturer Part Number
PIC16F1933-I/SO
Description
28 SOIC .300in TUBE, 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1933-ISS.pdf
(508 pages)
Specifications of PIC16F1933-I/SO
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1933-I/SO
Manufacturer:
MICROCHIP
Quantity:
2 000
Part Number:
PIC16F1933-I/SO
Manufacturer:
MICROCHI
Quantity:
20 000
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PIC16F193X/LF193X
REGISTER 5-3:
TABLE 5-2:
TABLE 5-3:
DS41364D-page 84
CONFIG1
CONFIG2
Legend:
Note
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
OSCCON
OSCSTAT
OSCTUNE
PIE2
PIR2
T1CON
Legend:
Note 1:
Name
Name
U-0
—
1:
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
PIC16F193X only.
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
PIC16F1934 only.
Bits
13:8
13:8
7:0
7:0
T1OSCR
SPLLEN
OSFIE
OSFIF
Unimplemented: Read as ‘0’
TUN<4:0>: Frequency Tuning bits
011111 = Maximum frequency
011110 =
•
•
•
000001 =
000000 = Oscillator module is running at the factory-calibrated frequency.
111111 =
•
•
•
100000 = Minimum frequency
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
SUMMARY OF CONFIGURATION WORD WITH CLOCK SOURCES
—
TMR1CS<1:0>
Bit -/7
U-0
CP
—
—
—
—
OSCTUNE: OSCILLATOR TUNING REGISTER
PLLR
C2IE
Bit 6
C2IF
—
MCLRE
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
Bit -/6
—
—
—
R/W-0/0
OSTS
Bit 5
C1IE
C1IF
T1CKPS<1:0>
Bit 13/5
FCMEN
PWRTE
LVP
IRCF<3:0>
VCAPEN<1:0>
R/W-0/0
HFIOFR
Preliminary
EEIE
EEIF
Bit 4
Bit 12/4
DEBUG
IESO
(1)
WDTE<1:0>
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
T1OSCEN
HFIOFL
R/W-0/0
BCLIE
BCLIF
Bit 3
CLKOUTEN
Bit 11/3
TUN<5:0>
—
—
TUN<5:0>
T1SYNC
MFIOFR
LCDIE
LCDIF
Bit 2
Bit 10/2
—
R/W-0/0
BORV
—
BOREN<1:0>
LFIOFR
FOSC<2:0>
Bit 1
STVREN
2009 Microchip Technology Inc.
Bit 9/1
—
—
—
SCS<1:0>
R/W-0/0
WRT<1:0>
CCP2IE
CCP2IF
TMR1ON
HFIOFS
Bit 0
PLLEN
Bit 8/0
CPD
(1)
(1)
R/W-0/0
Register
on Page
Register
on Page
101
104
201
82
83
84
64
66
bit 0
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