PIC16F1933-I/SO Microchip Technology Inc., PIC16F1933-I/SO Datasheet - Page 231
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PIC16F1933-I/SO
Manufacturer Part Number
PIC16F1933-I/SO
Description
28 SOIC .300in TUBE, 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1933-ISS.pdf
(508 pages)
Specifications of PIC16F1933-I/SO
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1933-I/SO
Manufacturer:
MICROCHIP
Quantity:
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Part Number:
PIC16F1933-I/SO
Manufacturer:
MICROCHI
Quantity:
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REGISTER 22-1:
2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-4
bit 3-0
Note 1:
R/W-00
PxM<1:0>
These bits are not implemented on CCP4 and CCP5.
PxM<1:0>: Enhanced PWM Output Configuration bits
Capture mode:
Unused
Compare mode:
Unused
If CCPxM<3:2> = 00, 01, 10:
xx =
If CCPxM<3:2> = 11:
00 =
01 =
10 =
11 =
DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: ECCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match
0011 = Reserved
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every 4th rising edge
0111 = Capture mode: every 16th rising edge
1000 = Compare mode: initialize ECCPx pin low; set output on compare match (set CCPxIF)
1001 = Compare mode: initialize ECCPx pin high; clear output on compare match (set CCPxIF)
1010 = Compare mode: generate software interrupt only; ECCPx pin reverts to I/O state
1011 = Compare mode: Special Event Trigger (ECCPx resets TMR1 or TMR3, sets CCPxIF bit, ECCP2 trigger
CCP4/CCP5 only:
11xx =
ECCP1/ECCP2/ECCP3 only:
1100 = PWM mode: PxA, PxC active-high; PxB, PxD active-high
1101 = PWM mode: PxA, PxC active-high; PxB, PxD active-low
1110 = PWM mode: PxA, PxC active-low; PxB, PxD active-high
1111 = PWM mode: PxA, PxC active-low; PxB, PxD active-low
(1)
R/W-0/0
CCPxCON: CCPx CONTROL REGISTER
PxA assigned as Capture/Compare input; PxB, PxC, PxD assigned as port pins
Single output; PxA modulated; PxB, PxC, PxD assigned as port pins
Full-Bridge output forward; PxD modulated; PxA active; PxB, PxC inactive
Half-Bridge output; PxA, PxB modulated with dead-band control; PxC, PxD assigned as port pins
Full-Bridge output reverse; PxB modulated; PxC active; PxA, PxD inactive
also starts A/D conversion if A/D module is enabled)
PWM mode
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
DCxB<1:0>
R/W-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
R/W-0/0
(1)
PIC16F193X/LF193X
(1)
R/W-0/0
CCPxM<3:0>
R/W-0/0
DS41364D-page 231
R/W-0/0
bit 0
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