PIC16F871-I/PT Microchip Technology Inc., PIC16F871-I/PT Datasheet - Page 57

• Manufacturer Part Number: PIC16F871-I/PT
• Description: 44 PIN, 7 KB FLASH, 128 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F871-I/PT

• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 33
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.0
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Table 8-1 shows the resources and interactions of the
CCP module. In the following sections, the operation of
a CCP module is described.
8.1
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
REGISTER 8-1:
 2003 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
MODULES
CCP1 Module
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER REGISTER (ADDRESS: 17h/1Dh)
bit 7
Unimplemented: Read as '0'
CCP1X:CCP1Y: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M3:CCP1M0: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
U-0
—
unaffected)
CCP1resets TMR1, and starts an A/D conversion (if A/D module is enabled)
U-0
—
CCP1X
R/W-0
W = Writable bit
‘1’ = Bit is set
CCP1Y
R/W-0
Additional information on CCP modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023) and in application note AN594,
“Using the CCP Modules” (DS00594).
TABLE 8-1:
CCP Mode
CCP1M3
Compare
Capture
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWM
PIC16F870/871
CCP MODE - TIMER
RESOURCES REQUIRED
CCP1M2 CCP1M1
R/W-0
x = Bit is unknown
Timer Resource
R/W-0
DS30569B-page 55
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0