PIC16F627-04/SO Microchip Technology Inc., PIC16F627-04/SO Datasheet - Page 52

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PIC16F627-04/SO

Manufacturer Part Number
PIC16F627-04/SO
Description
18 PIN, 1.75 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F627-04/SO

Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
1.75K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F62X
8.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
RESET.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit Period Register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 Control register.
DS40300C-page 50
or
TIMER2 MODULE
1:16,
OSC
selected
/4) has a prescale option of 1:1,
by
control
Preliminary
bits
8.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device RESET (Power-on Reset, MCLR
TMR2 is not cleared when T2CON is written.
8.2
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module which optionally uses
it to generate shift clock.
FIGURE 8-1:
Note
Reset, Watchdog Timer Reset, or Brown-out
Reset)
Sets flag
bit TMR2IF
TOUTPS<3:0>
Postscaler
1:1
1:
Timer2 Prescaler and Postscaler
Output of TMR2
to
TMR2 register output can be software selected by the
SSP Module as a baud clock.
1:16
4
TMR2
output (1)
RESET
EQ
Comparator
TIMER2 BLOCK DIAGRAM
TMR2 reg
PR2 reg
 2003 Microchip Technology Inc.
1:1, 1:4, 1:16
T2CKPS<1:0>
Prescaler
2
F
OSC
/4

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