PIC16F627-04/SO Microchip Technology Inc., PIC16F627-04/SO Datasheet - Page 44

• Manufacturer Part Number: PIC16F627-04/SO
• Description: 18 PIN, 1.75 KB FLASH, 224 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F627-04/SO

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 16
• Interface: SCI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 1.75K Bytes
• Ram Size: 224 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F62X
5.3
5.3.1
Any instruction which writes, operates internally as a
read followed by a write operation. The BCF and BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result
back to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a BSF operation on Bit 5
of PORTB will cause all eight bits of PORTB to be read
into the CPU. Then the BSF operation takes place on
Bit 5 and PORTB is written to the output latches. If
another bit of PORTB is used as a bi-directional I/O pin
(e.g., Bit 0) and it is defined as an input at this time, the
input signal present on the pin itself would be read into
the CPU and rewritten to the data latch of this particular
pin, overwriting the previous content. As long as the pin
stays in the Input mode, no problem occurs. However,
if Bit 0 is switched into Output mode later on, the
content of the data latch may now be unknown.
Reading a port register, reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(ex. BCF, BSF, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
Example 5-2 shows the effect of two sequential read-
modify-write instructions (ex., BCF, BSF, etc.) on an
I/O port.
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage
the chip.
FIGURE 5-16:
DS40300C-page 42
Note
I/O Programming Considerations
1:
2:
BI-DIRECTIONAL I/O PORTS
This example shows write to PORTB followed by a read from PORTB.
Data setup time = (0.25 T
Therefore, at higher clock frequencies, a write followed by a read may be problematic.
Instruction
fetched
SUCCESSIVE I/O OPERATION
PC
Q1 Q2 Q3 Q4
MOWF PORTB
Write to PORTB
PC
CY
- T
PD
) where T
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
MOWF PORTB, W
Read to PORTB
CY
Execute
MOVWF
PORTB
PC + 1
Preliminary
= instruction cycle and T
T
PD
EXAMPLE 5-2:
;Initial PORT settings:PORTB<7:4> Inputs
;
;
;PORTB<7:6> have external pull-up and are not
;connected to other circuitry
;
;
;
;Note that the user may have expected the pin
;values to be 00pp pppp. The 2nd BCF caused
;RB7 to be latched as the pin value (High).
5.3.2
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 5-
16). Therefore, care must be exercised if a write
followed by a read operation is carried out on the same
I/O port. The sequence of instructions should be such
to allow the pin voltage to stabilize (load dependent)
before the next instruction which causes that file to be
read into the CPU is executed. Otherwise, the previous
state of that pin may be read into the CPU rather than
the new state. When in doubt, it is better to separate
these instructions with a NOP or another instruction not
accessing this I/O port.
Port pin
sampled here
BCF STATUS, RP0
BCF PORTB, 7
BSF STATUS, RP0
BCF TRISB, 7
BCF TRISB, 6
PC + 2
Execute
MOVWF
PORTB
PD
NOP
= propagation delay of Q1 cycle to output valid.
SUCCESSIVE OPERATIONS ON I/O
PORTS
Execute
PC + 3
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
NOP
NOP
 2003 Microchip Technology Inc.
PORT latchPORT Pins
---------- ----------
;
;01pp pppp 11pp pppp
;
;10pp pppp 11pp pppp
;10pp pppp 10pp pppp
PORTB<3:0> Outputs