DS1100Z-50+ Dallas Semiconductor, DS1100Z-50+ Datasheet - Page 5

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DS1100Z-50+

Manufacturer Part Number
DS1100Z-50+
Description
Delay Line, 150 nS Max., 5-Tap Economy, 5 V Ops., -40 to 85 C, SOIC8
Manufacturer
Dallas Semiconductor
Datasheet

Specifications of DS1100Z-50+

Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of any tap output pulse.
t
pulse and the 1.5V point on the trailing edge of any tap output pulse.
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1100.
The input waveform is produced by a precision-pulse generator under software control. Time delays are
measured by a time interval counter (20ps resolution) connected between the input and each tap. Each tap
is selected and connected to the counter by a VHF switch control unit. All measurements are fully
automated, with each instrument controlled by a central computer over an IEEE 488 bus.
TEST CONDITIONS INPUT :
Ambient Temperature:
Supply Voltage (V
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising and falling edge.
NOTE:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
CC
):
+25°C ±3°C
5.0V ±0.1V
High = 3.0V ±0.1V
Low = 0.0V ±0.1V
50W max
3.0ns max (measured between 0.6V and 2.4V)
500ns (1µs for -500 version)
1µs (2µs for -500 version)
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