DS1100-25 Dallas Semiconductor, DS1100-25 Datasheet
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DS1100-25
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DS1100-25 Summary of contents
Page 1
... Industrial Temperature Ranges DESCRIPTION The DS1100 series delay lines have five equally spaced taps providing delays from 4ns to 500ns. These devices are offered in 8-pin DIPs and surface-mount packages to save PC board area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and industry-standard DIP and SO packaging ...
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... Figure 1. LOGIC DIAGRAM Table 1. DS1100 PART NUMBER DELAY TABLE (All Values in ns) PART DS1100-XXX TAP 1 -20 4 -25 5 -30 6 -35 7 -40 8 -45 9 -50 10 -60 12 -75 15 -100 20 -125 25 -150 30 -175 35 -200 40 -250 50 -300 60 -500 100 Figure 2. TIMING DIAGRAM: SILICON DELAY LINE NOMINAL DELAYS ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature Short-Circuit Output Current *This is a stress rating only and functional operation of the device at these or any other conditions above ...
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NOTES: 1) Initial tolerances are ± with respect to the nominal value at +25°C and 5V for both leading and trailing edge. 2) Temperature and voltage tolerance is with respect to the nominal delay value over the stated temperature range, ...
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... TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1100. The input waveform is produced by a precision-pulse generator under software control. Time delays are measured by a time interval counter (20ps resolution) connected between the input and each tap. Each tap is selected and connected to the counter by a VHF switch control unit ...
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... ORDERING INFORMATION DS1100 EXAMPLE: The DS1100Z-250 is a 250ns delay (input-to-tap 5) DS1100 in the SO package. TOTAL TIME DELAY (ns): 20, 25, 30, 35, 40, 45, 50, 60, 75, 100, 125, 150, 175, 200, 250, 300, 500 PACKAGE TYPE DIP (150MIL µSOP ...