MCP23S08-E/SO Microchip Technology Inc., MCP23S08-E/SO Datasheet - Page 15

• Manufacturer Part Number: MCP23S08-E/SO
• Description: 8-BIT INPUT/OUTPUT EXPANDER, SPI INTERFACE
• Manufacturer: Microchip Technology Inc.
• Type: Programmable Peripheral Interfacer

Specifications of MCP23S08-E/SO

• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

1.6.6
The IOCON register contains several bits for
configuring the device:
• The Sequential Operation (SEQOP) controls the
• The Slew Rate (DISSLW) bit controls the slew
REGISTER 1-6:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
incrementing function of the address pointer. If the
address pointer is disabled, the address pointer
does not automatically increment after each byte
is clocked during a serial transfer. This feature is
useful when it is desired to continuously poll
(read) or modify (write) a register.
rate function on the SDA pin. If enabled, the SDA
slew rate will be controlled when driving from a
high to a low.
U-0
—
CONFIGURATION (IOCON)
REGISTER
Unimplemented: Read as ‘0’.
SEQOP: Sequential Operation mode bit.
1 = Sequential operation disabled, address pointer does not increment.
0 = Sequential operation enabled, address pointer increments.
DISSLW: Slew Rate control bit for SDA output.
1 = Slew rate disabled.
0 = Slew rate enabled.
HAEN: Hardware Address Enable bit (MCP23S08 only).
Address pins are always enabled on MCP23008.
1 = Enables the MCP23S08 address pins.
0 = Disables the MCP23S08 address pins.
ODR: This bit configures the INT pin as an open-drain output.
1 = Open-drain output (overrides the INTPOL bit).
0 = Active driver output (INTPOL bit sets the polarity).
INTPOL: This bit sets the polarity of the INT output pin.
1 = Active-high.
0 = Active-low.
Unimplemented: Read as ‘0’.
U-0
—
IOCON – I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)
W = Writable bit
‘1’ = Bit is set
SEQOP
R/W-0
DISSLW
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MCP23008/MCP23S08
R/W-0
HAEN
• The Hardware Address Enable (HAEN) control bit
• The Open-Drain (ODR) control bit enables/
• The Interrupt Polarity (INTPOL) control bit sets
enables/disables the hardware address pins (A1,
A0) on the MCP23S08. This bit is not used on the
MCP23008. The address pins are always enabled
on the MCP23008.
disables the INT pin for open-drain configuration.
the polarity of the INT pin. This bit is functional
only when the ODR bit is cleared, configuring the
INT pin as active push-pull.
R/W-0
ODR
x = Bit is unknown
INTPOL
R/W-0
DS21919D-page 15
U-0
—
bit 0