DSPIC30F4013-20E/P Microchip Technology Inc., DSPIC30F4013-20E/P Datasheet - Page 103
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DSPIC30F4013-20E/P
Manufacturer Part Number
DSPIC30F4013-20E/P
Description
16 BIT MCU/DSP 40LD 20MIPS 48 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F4013-20EP.pdf
(204 pages)
Specifications of DSPIC30F4013-20E/P
A/d Inputs
13-Channels, 12-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
CAN, I2C/SPI/UART, USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
40-pin PDIP
Programmable Memory
48K Bytes
Ram Size
2K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F4013-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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15.0
This section describes the Universal Asynchronous
Receiver/Transmitter Communications module. The
dsPIC30F2011/2012/3012 processors have one UART
module (UART1). The dsPIC30F3013 processor has
two UART modules (UART1 and UART2).
FIGURE 15-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “ dsPIC30F Family Reference
Manual” (DS70046).
UxTX
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART) MODULE
x = 1 or 2.
UART TRANSMITTER BLOCK DIAGRAM
Internal Data Bus
UTXBRK
Data
Parity
dsPIC30F2011/2012/3012/3013
‘
‘
0
1
’ (Start)
’ (Stop)
Generator
Parity
Write
UTX8 UxTXREG Low Byte
Transmit Shift Register (UxTSR)
15.1
The key features of the UART module are:
• Full-duplex, 8 or 9-bit data communication
• Even, odd or no parity options (for 8-bit data)
• One or two Stop bits
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates range from 38 bps to 1.875 Mbps at a
• 4-word deep transmit data buffer
• 4-word deep receive data buffer
• Parity, framing and buffer overrun error detection
• Support for interrupt only on address detect
• Separate transmit and receive interrupts
• Loopback mode for diagnostic support
• Alternate receive and transmit pins for UART1
prescaler
30 MHz instruction rate
(9th bit = 1)
Load TSR
16 Divider
UART Module Overview
Write
Control
Signals
Control and Status bits
– Control TSR
– Control Buffer
– Generate Flags
– Generate Interrupt
Transmit Control
16x Baud Clock
from Baud Rate
Generator
DS70139D-page 101
UxTXIF
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