PIC16F819-I/SS Microchip Technology Inc., PIC16F819-I/SS Datasheet - Page 15

• Manufacturer Part Number: PIC16F819-I/SS
• Description: 20 PIN, 3.5 KB FLASH, 256 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F819-I/SS

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin SSOP
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
 2004 Microchip Technology Inc.
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
Bank 0
(1)
(1)
(1)
(1)
(1,2)
(1)
2:
3:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
ADRESH
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are
transferred to the upper byte of the program counter.
Pin 5 is an input only; the state of the TRISA5 bit has no effect and will always read ‘1’.
Name
SPECIAL FUNCTION REGISTERS
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTA Data Latch when written; PORTA pins when read
PORTB Data Latch when written; PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register (LSB)
Capture/Compare/PWM Register (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
A/D Result Register High Byte
ADCS1
WCOL
Bit 7
IRP
GIE
—
—
—
—
—
—
TOUTPS3 TOUTPS2
SSPOV
ADCS0
PEIE
ADIF
Bit 6
RP1
—
—
—
—
T1CKPS1
TMR0IE
SSPEN
CCP1X
CHS2
Bit 5
RP0
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
TOUTPS1
T1CKPS0
CCP1Y
CHS1
INTE
Bit 4
EEIF
CKP
TO
—
T1OSCEN
TOUTPS0
CCP1M3
SSPM3
SSPIF
CHS0
RBIE
Bit 3
PD
—
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral feature section.
GO/DONE
TMR2ON
CCP1M2
T1SYNC
TMR0IF
CCP1IF
SSPM2
Bit 2
—
Z
PIC16F818/819
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
SSPM1
INTF
Bit 1
DC
—
—
T2CKPS0
TMR1ON
CCP1M0
TMR1IF
SSPM0
ADON
RBIF
Bit 0
—
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxx0 0000
xxxx xxxx
---0 0000
0000 000x
-0-- 0000
---0 ----
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx 66, 67, 68
xxxx xxxx 66, 67, 68
--00 0000
xxxx xxxx
0000 00-0
POR, BOR
DS39598E-page 13
Value on
—
—
—
—
—
—
—
—
—
Details on
53, 17
71, 76
page:
23
23
16
23
39
43
—
—
—
23
18
20
21
57
57
57
63
64
73
65
—
—
—
—
—
—
81
81