PIC16C770/P Microchip Technology Inc., PIC16C770/P Datasheet - Page 77
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16C770/P
Manufacturer Part Number
PIC16C770/P
Description
20 PIN, 3.5 KB OTP, 256 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C770P.pdf
(220 pages)
Specifications of PIC16C770/P
A/d Inputs
6-Channel, 12-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
16
Interface
I2C/SPI
Memory Type
OTP
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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9.1.7
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from SLEEP. After the device returns to
Normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI transmit/receive shift register
operates asynchronously to the device. This allows the
device to be placed in SLEEP mode and data to be
shifted into the SPI transmit/receive shift register.
When all eight bits have been received, the SSPIF
interrupt flag bit will be set and if enabled will wake the
device from SLEEP.
TABLE 9-1:
Legend: x = unknown, u = unchanged, - = unimplemented read as ’0’. Shaded cells are not used by the MSSP in SPI mode.
10Bh,18Bh
2002 Microchip Technology Inc.
0Bh, 8Bh,
Address
0Ch
8Ch
9Dh
13h
14h
94h
86h
SLEEP OPERATION
SSPSTAT
SSPCON
SSPBUF
INTCON
ANSEL
TRISB
Name
PIR1
PIE1
REGISTERS ASSOCIATED WITH SPI OPERATION
WCOL
Bit 7
SMP
GIE
—
—
SSPOV
PEIE
ADIF
ADIE
Bit 6
CKE
Synchronous Serial Port Receive Buffer/Transmit Register
SSPEN
Advance Information
Bit 5
T0IE
D/A
—
—
INTE
Bit 4
CKP
—
—
P
SSPM3
SSPIE
SSPIF
RBIE
Bit 3
S
9.1.8
A RESET disables the MSSP module and terminates
the current transfer.
PIC16C717/770/771
CCP1IF
CCP1IE
SSPM2
Bit 2
T0IF
R/W
EFFECTS OF A RESET
TMR2IF
TMR2IE
SSPM1
INTF
Bit 1
UA
TMR1IF
TMR1IE
SSPM0
RBIF
Bit 0
BF
0000 000x
-0-- 0000
-0-- 0000
xxxx xxxx
0000 0000
0000 0000
--11 1111
1111 1111
POR, BOR
DS41120B-page 75
MCLR, WDT
0000 000u
-0-- 0000
-0-- 0000
uuuu uuuu
0000 0000
0000 0000
--11 1111
1111 1111
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