PIC18LF452-I/PT Microchip Technology Inc., PIC18LF452-I/PT Datasheet - Page 200

• Manufacturer Part Number: PIC18LF452-I/PT
• Description: 44 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18LF452-I/PT

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18FXX2
REGISTER 19-4:
REGISTER 19-5:
DS39564B-page 198
bit 7-1
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
CONFIGURATION REGISTER 3 HIGH (CONFIG3H: BYTE ADDRESS 300005h)
CONFIGURATION REGISTER 4 LOW (CONFIG4L: BYTE ADDRESS 300006h)
Legend:
R = Readable bit
- n = Value when device is unprogrammed
Legend:
R = Readable bit
- n = Value when device is unprogrammed
Unimplemented: Read as ‘0’
CCP2MX: CCP2 Mux bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
bit 7
DEBUG: Background Debugger Enable bit
1 = Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
Unimplemented: Read as ‘0’
LVP: Low Voltage ICSP Enable bit
1 = Low Voltage ICSP enabled
0 = Low Voltage ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack Full/Underflow will cause RESET
0 = Stack Full/Underflow will not cause RESET
bit 7
BKBUG
R/P-1
U-0
—
U-0
U-0
—
—
C = Clearable bit
P = Programmable bit
U-0
—
U-0
—
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
U-0
—
—
R/P-1
LVP
U-0
—
2002 Microchip Technology Inc.
U-0
U-0
—
—
CCP2MX
STVREN
R/P-1
R/P-1
bit 0
bit 0