DS26521LN+ Maxim Integrated Products, DS26521LN+ Datasheet - Page 86

• Manufacturer Part Number: DS26521LN+
• Description: IC TXRX T1/E1/J1 64-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26521LN+

• Number Of Drivers/receivers: 1/1
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0D8h–0EFh
11Ch–11Fh
0F0h–0FFh
100h–10Fh
115h–117h
ADDRESS
0CCh
0CDh
0CAh
0CBh
0CEh
0CFh
0C1h
0C2h
0C3h
0C4h
0C5h
0C6h
0C7h
0C8h
0C9h
0D0h
0D1h
0D2h
0D3h
0D4h
0D5h
0D6h
0D7h
11Ah
11Bh
12Ah
12Bh
12Ch
110h
111h
112h
113h
114h
118h
119h
120h
121h
122h
123h
124h
125h
126h
127h
128h
129h
(Section 9.3)
E1TSACR
RGCCS1
RGCCS2
RGCCS3
RGCCS4
Registers
RBPCS1
RBPCS2
RBPCS3
RBPCS4
RCICE1
RCICE2
RCICE3
RCICE4
TIDR10
TIDR11
TIDR12
TIDR13
RBCS2
RBCS3
RBCS4
RCBR1
RCBR2
RCBR3
RCBR4
THBSE
NAME
Global
TIDR1
TIDR2
TIDR3
TIDR4
TIDR5
TIDR6
TIDR7
TIDR8
TIDR9
SSIE1
SSIE2
SSIE3
SSIE4
THC1
THC2
RSI1
RSI2
RSI3
RSI4
—
—
—
—
—
Receive Blank Channel Select Register 2
Receive Blank Channel Select Register 3
Receive Blank Channel Select Register 4 (E1 Mode Only)
Receive Channel Blocking Register 1
Receive Channel Blocking Register 2
Receive Channel Blocking Register 3
Receive Channel Blocking Register 4 (E1 Mode Only)
Receive-Signaling Reinsertion Enable Register 1
Receive-Signaling Reinsertion Enable Register 2
Receive-Signaling Reinsertion Enable Register 3
Receive-Signaling Reinsertion Enable Register 4 (E1 Mode Only)
Receive Gapped Clock Channel Select Register 1
Receive Gapped Clock Channel Select Register 2
Receive Gapped Clock Channel Select Register 3
Receive Gapped Clock Channel Select Register (E1 Mode Only)
Receive Channel Idle Code Enable Register 1
Receive Channel Idle Code Enable Register 2
Receive Channel Idle Code Enable Register 3
Receive Channel Idle Code Enable Register 4 (E1 Mode Only)
Receive BERT Port Channel Select Register 1
Receive BERT Port Channel Select Register 2
Receive BERT Port Channel Select Register 3
Receive BERT Port Channel Select Register (E1 Mode Only)
Reserved
See the Global Register list in
“Reserved” in Framers 2 to 8.
Reserved
Transmit HDLC Control Register 1
Transmit HDLC Bit Suppress Register
Reserved
Transmit HDLC Control Register 2
E1 Transmit Sa-Bit Control Register (E1 Mode)
Reserved
Software-Signaling Insertion Enable Register 1
Software-Signaling Insertion Enable Register 2
Software-Signaling Insertion Enable Register 3
Software-Signaling Insertion Enable Register 4 (E1 Mode Only)
Reserved
Transmit Idle Code Definition Register 1
Transmit Idle Code Definition Register 2
Transmit Idle Code Definition Register 3
Transmit Idle Code Definition Register 4
Transmit Idle Code Definition Register 5
Transmit Idle Code Definition Register 6
Transmit Idle Code Definition Register 7
Transmit Idle Code Definition Register 8
Transmit Idle Code Definition Register 9
Transmit Idle Code Definition Register 10
Transmit Idle Code Definition Register 11
Transmit Idle Code Definition Register 12
Transmit Idle Code Definition Register 13
FRAMER REGISTER LIST
86 of 258
DESCRIPTION
Table
9-2. Note that this space is
DS26521 Single T1/E1/J1 Transceiver
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—