MCP23017-E/SP Microchip Technology Inc., MCP23017-E/SP Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
MCP23017-E/SP
Manufacturer Part Number
MCP23017-E/SP
Description
I/O Port Expander, 16-Bit, I2C I'face, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
Programmable Peripheral Interfacer
Datasheet
1.MCP23017-ESP.pdf
(48 pages)
Specifications of MCP23017-E/SP
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP23017-E/SP
Manufacturer:
MICROCHIP
Quantity:
1 001
1.2
The on-chip POR circuit holds the device in reset until
V
the POR circuit (i.e., release the device from reset).
The maximum V
“Electrical Characteristics”.
When the device exits the POR condition (releases
reset), device operating parameters (i.e., voltage,
temperature, serial bus frequency, etc.) must be met to
ensure proper operation.
1.3
This block handles the functionality of the I
(MCP23017) or SPI (MCP23S17) interface protocol.
The MCP23X17 contains 22 individual registers (11
register pairs) that can be addressed through the Serial
Interface block, as shown in
TABLE 1-2:
© 2007 Microchip Technology Inc.
IOCON.BANK = 1
DD
has reached a high enough voltage to deactivate
Address
0Ah
1Ah
00h
10h
01h
11h
02h
12h
03h
13h
04h
14h
05h
15h
06h
16h
07h
17h
08h
18h
09h
19h
Power-on Reset (POR)
Serial Interface
DD
REGISTER ADDRESSES
rise time is specified in Section 2.0
IOCON.BANK = 0
Address
0Ah
0Bh
0Ch
0Dh
0Eh
Table
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Fh
10h
12h
13h
14h
15h
11h
1-2.
IODIRA
IODIRB
IPOLA
IPOLB
GPINTENA
GPINTENB
DEFVALA
DEFVALB
INTCONA
INTCONB
IOCON
IOCON
GPPUA
GPPUB
INTFA
INTFB
INTCAPA
INTCAPB
GPIOA
GPIOB
OLATA
OLATB
Access to:
2
C
MCP23017/MCP23S17
1.3.1
The MCP23X17 family has the ability to operate in Byte
mode or Sequential mode (IOCON.SEQOP).
Byte Mode disables automatic Address Pointer
incrementing. When operating in Byte mode, the
MCP23X17 family does not increment its internal
address counter after each byte during the data
transfer. This gives the ability to continually access the
same address by providing extra clocks (without
additional control bytes). This is useful for polling the
GPIO register for data changes or for continually
writing to the output latches.
A special mode (Byte mode with IOCON.BANK = 0)
causes the address pointer to toggle between
associated A/B register pairs. For example, if the BANK
bit is cleared and the Address Pointer is initially set to
address 12h (GPIOA) or 13h (GPIOB), the pointer will
toggle between GPIOA and GPIOB. Note that the
Address Pointer can initially point to either address in
the register pair.
Sequential mode enables automatic address pointer
incrementing. When operating in Sequential mode, the
MCP23X17 family increments its address counter after
each byte during the data transfer. The Address Pointer
automatically rolls over to address 00h after accessing
the last register.
These two modes are not to be confused with single
writes/reads and continuous writes/reads that are
serial protocol sequences. For example, the device
may be configured for Byte mode and the master may
perform a continuous read. In this case, the
MCP23X17 would not increment the Address Pointer
and would repeatedly drive data from the same
location.
1.3.2
1.3.2.1
The I
register address sequence, as shown in the bottom of
Figure
data from the master and an Acknowledge (ACK) from
the MCP23017. The operation is ended with a Stop (P)
or Restart (SR) condition being generated by the
master.
Data is written to the MCP23017 after every byte
transfer. If a Stop or Restart condition is generated
during a data transfer, the data will not be written to the
MCP23017.
Both “byte writes” and “sequential writes” are
supported by the MCP23017. If Sequential mode is
enabled (IOCON, SEQOP = 0) (default), the
MCP23017 increments its address counter after each
ACK during the data transfer.
2
C write operation includes the control byte and
1-1. This sequence is followed by eight bits of
BYTE MODE AND SEQUENTIAL
MODE
I
2
C INTERFACE
I
2
C Write Operation
DS21952B-page 5