DS90C385AMT/NOPB National Semiconductor, DS90C385AMT/NOPB Datasheet

IC TX LVDS FPD 24BIT 56-TSSOP

DS90C385AMT/NOPB

Manufacturer Part Number
DS90C385AMT/NOPB
Description
IC TX LVDS FPD 24BIT 56-TSSOP
Manufacturer
National Semiconductor
Type
Transmitterr
Datasheet

Specifications of DS90C385AMT/NOPB

Number Of Drivers/receivers
1/0
Protocol
LVDS
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Supply Current
65mA
Supply Voltage Range
3V To 3.6V
Driver Case Style
TSSOP
No. Of Pins
56
Operating Temperature Range
-10°C To +70°C
Msl
MSL 2 - 1 Year
Device Type
Line
Filter Terminals
SMD
Rohs Compliant
Yes
Esd Hbm
7kV
For Use With
FLINK3V8BT-85 - BOARD EVAL DS90C385A,DS90CF386
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DS90C385AMT
*DS90C385AMT/NOPB
DS90C385AMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS90C385AMT/NOPB
Quantity:
20 000
© 2006 National Semiconductor Corporation
DS90C385A
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display Link-87.5 MHz
General Description
The DS90C385A is a pin to pin compatible replacement for
DS90C383, DS90C383A and DS90C385. The DS90C385A
has additional features and improvements making it an ideal
replacement for DS90C383, DS90C383A and DS90C385.
family of LVDS Transmitters.
The DS90C385A transmitter converts 28 bits of LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signal-
ing) data streams. A phase-locked transmit clock is transmit-
ted in parallel with the data streams over the fifth LVDS link.
Every cycle of the transmit clock 28 bits of input data are
sampled and transmitted. At a transmit clock frequency of
87.5 MHz, 24 bits of RGB data and 3 bits of LCD timing and
control data (FPLINE, FPFRAME, DRDY) are transmitted at
a rate of 612.5Mbps per LVDS data channel. Using a 87.5
MHz clock, the data throughput is 306.25Mbytes/sec. This
transmitter can be programmed for Rising edge strobe or
Falling edge strobe through a dedicated pin. A Rising edge
or Falling edge strobe transmitter will interoperate with a
Falling edge strobe FPDLink Receiver without any transla-
tion logic.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high-speed TTL interfaces
with added Spread Spectrum Clocking support.
Block Diagram
DS200702
See NS Package Number MTD56
Order Number DS90C385AMT
DS90C385A
Features
n Pin-to-pin compatible to DS90C383, DS90C383A and
n No special start-up sequence required between
n Support Spread Spectrum Clocking up to 100kHz
n “Input Clock Detection” feature will pull all LVDS pairs to
n 18 to 87.5 MHz shift clock support
n Tx power consumption
n Tx Power-down mode
n Supports VGA, SVGA, XGA, SXGA(dual pixel),
n Narrow bus reduces cable size and cost
n Up to 2.45 Gbps throughput
n Up to 306.25Megabytes/sec bandwidth
n 345 mV (typ) swing LVDS devices for low EMI
n PLL requires no external components
n Compliant to TIA/EIA-644 LVDS standard
n Low profile 56-lead TSSOP package
DS90C385 .
clock/data and /PD pins. Input signals (clock and data)
can be applied either before or after the device is
powered.
frequency modulation & deviations of
spread or -5% down spread.
logic low when input clock is missing and when /PD pin
is logic high.
Grayscale
SXGA+(dual pixel), UXGA(dual pixel).
20070201
<
<
60 µW (typ)
147 mW (typ)
±
2.5% center
@
87.5 MHz
www.national.com
April 2006

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DS90C385AMT/NOPB Summary of contents

Page 1

... This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces with added Spread Spectrum Clocking support. Block Diagram © 2006 National Semiconductor Corporation Features n Pin-to-pin compatible to DS90C383, DS90C383A and DS90C385 . n No special start-up sequence required between clock/data and /PD pins ...

Page 2

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( CMOS/TTL Input Voltage LVDS Driver Output Voltage LVDS Output Short Circuit Duration Junction Temperature Storage Temperature Lead Temperature (Soldering, 4 sec) ...

Page 3

Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter TRANSMITTER SUPPLY CURRENT ICCTG Transmitter Supply Current 16 Grayscale ICCTZ Transmitter Supply Current Power Down Note 1: “Absolute Maximum Ratings” are those values beyond which the ...

Page 4

Transmitter Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified Symbol TPPos0 Transmitter Output Pulse Position (Figure 12) (Note 5) TPPos1 Transmitter Output Pulse Position TPPos2 Transmitter Output Pulse Position TPPos3 Transmitter Output Pulse Position TPPos4 Transmitter ...

Page 5

Transmitter Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified Symbol SSCG Spread Spectrum Clock support; Modulation frequency with a linear profile.(Note 6) TPLLS Transmitter Phase Lock Loop Set (Figure 9) TPDD Transmitter Power Down Delay (Figure ...

Page 6

AC Timing Diagrams FIGURE 2. “16 Grayscale” Test Pattern - DS90C385A (Notes 8, 9, 10) Note 7: The worst case test pattern produces a maximum toggling of digital circuits, LVDS I/O and LVCMOS/LVTTL I/O. Note 8: The 16 grayscale test ...

Page 7

AC Timing Diagrams (Continued) FIGURE 3. DS90C385A (Transmitter) LVDS Output Load. 5pF is showed as board loading FIGURE 4. DS90C385A (Transmitter) LVDS Transition Times FIGURE 5. DS90C385A (Transmitter) Input Clock Transition Time FIGURE 6. DS90C385A (Transmitter) Setup/Hold and High/Low Times ...

Page 8

AC Timing Diagrams FIGURE 8. DS90C385A (Transmitter) Clock In to Clock Out Delay with R_FB pin = GND FIGURE 9. DS90C385A (Transmitter) Phase Lock Loop Set Time FIGURE 10. 28 Parallel TTL Data Inputs Mapped to LVDS Outputs - DS90C385A ...

Page 9

AC Timing Diagrams (Continued) FIGURE 12. Transmitter LVDS Output Pulse Position Measurement - DS90C385A FIGURE 11. Transmitter Power Down Delay 9 20070218 20070226 www.national.com ...

Page 10

DS90C385A MTD56 (TSSOP) Package Pin Descriptions — FPD Link Transmitter Pin Name I/O No. TxIN I 28 LVTTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines — FPLINE, FPFRAME and DRDY (also referred to ...

Page 11

Pin Diagram for TSSOP Packages Applications Information The DS90C385A is backward compatible DS90C385, DS90C383A, DS90C383 in TSSOP 56-lead package, and pin-for-pin replacements. This device DS90C385A also features reduced variation of the TCCD parameter which is important for ...

Page 12

Typical Application Truth Table www.national.com TABLE 1. Programmable Transmitter (DS90C385A) Pin Condition Strobe Status R_FB R_FB = V Rising edge strobe CC R_FB R_FB = GND or NC Falling edge strobe 12 20070203 ...

Page 13

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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