PIC18F452-I/P Microchip Technology Inc., PIC18F452-I/P Datasheet - Page 104
PIC18F452-I/P
Manufacturer Part Number
PIC18F452-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F452-IP.pdf
(390 pages)
Specifications of PIC18F452-I/P
A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18F2420/2520/4420/4520
9.5
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
REGISTER 9-10:
DS39631A-page 102
RCON Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16XXX Compatibility mode)
SBOREN: Software BOR Enable bit
For details of bit operation, see Register 4-1.
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-1.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-1.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-1.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note 1: Actual Reset values are determined by device configuration and the nature of the
IPEN
device Reset. See Register 4-1 for additional information.
SBOREN
R/W-1
(1)
Preliminary
U-0
W = Writable bit
‘1’ = Bit is set
—
(1)
R/W-1
The operation of the SBOREN bit and the Reset flag
bits is discussed in more detail in Section 4.1 “RCON
Register”.
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
R-1
PD
2004 Microchip Technology Inc.
R/W-0
POR
x = Bit is unknown
(1)
R/W-0
BOR
bit 0
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