DP8390DN National Semiconductor, DP8390DN Datasheet - Page 11

• Manufacturer Part Number: DP8390DN
• Description: IC NIC (NETWORK INT CTRL)48-DIP
• Manufacturer: National Semiconductor

Specifications of DP8390DN

• Controller Type: Network Interface Controller (NIC)
• Voltage - Supply: 5V
• Current - Supply: 40mA
• Mounting Type: Through Hole
• Package / Case: 48-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Operating Temperature: -
• Interface: -
• Other names: *DP8390DN

7 0 Packet Reception
3 After a packet is DMAed from the Receive Buffer Ring
Note the size of the Receive Buffer Ring is reduced by one
256-byte buffer this will not however impede the operation
of the NIC
In StarLAN applications using bus clock frequencies greater
than 4 MHz the NIC does not update the buffer header
information properly because of the disparity between the
network and bus clock speeds The lower byte count is cop-
ied twice into the third and fourth locations of the buffer
header and the upper byte count is not written The upper
byte count however can be calculated from the current
next page pointer (second byte in the buffer header) and the
previous next page pointer (stored in memory by the CPU)
The following routine calculates the upper byte count and
allows StarLAN applications to be insensitive to bus clock
speeds Next pkt is defined similarly as above
STORAGE FORMAT FOR RECEIVED PACKETS
The following diagrams describe the format for how re-
ceived packets are placed into memory by the local DMA
channel These modes are selected in the Data Configura-
tion Register
This format used with Series 32000 808X type processors
upper byte count
if (upper byte count)
upper byte count
if (lower byte count)
upper byte count
the Next Page Pointer (second byte in NIC buffer header)
is used to update BNDRY and next pkt
next pkt
BNDRY
If BNDRY
1st Received Packet Removed By Remote DMA
BOS
e
AD15
e
k
Byte Count 1
Next Page Pointer
Next Packet
e
Next Page Pointer
PSTART then BNDRY
Receive
Pointer
Byte 2
0 WTS
e
e
e
Storage Format
(PSTOP
(next page pointer
l
upper byte count
k
next page pointer
e
AD8
0 fch then
0 then
1 in Data Configuration Register
b
AD7
b
Byte Count 0
next pkt)
Receive
Receive
(Continued)
1
Status
Byte 1
e
a
b
b
PSTOP
1
AD0
PSTART)
next pkt
a
TL F 8582 – 57
b
1
b
b
1
1
11
This format used with 68000 type processors
Note The Receive Byte Count ordering remains the same for BOS
This format used with general 8-bit CPUs
8 0 Packet Transmission
The Local DMA is also used during transmission of a pack-
et Three registers control the DMA transfer during trans-
mission a Transmit Page Start Address Register (TPSR)
and the Transmit Byte Count Registers (TBCR0 1) When
the NIC receives a command to transmit the packet pointed
to by these registers buffer memory data will be moved into
the FIFO as required during transmission The NIC will gen-
erate and append the preamble synch and CRC fields
TRANSMIT PACKET ASSEMBLY
The NIC requires a contiguous assembled packet with the
format shown The transmit byte count includes the Destina-
tion Address Source Address Length Field and Data It
does not include preamble and CRC When transmitting
data smaller than 46 bytes the packet must be padded to a
minimum size of 64 bytes The programmer is responsible
for adding and stripping pad bytes
BOS
BOS
AD7
AD15
General Transmit Packet Format
Byte Count 0
Next Packet
e
e
Receive
Pointer
1 WTS
0 WTS
Byte 1
Receive Status
Receive Byte
Receive Byte
e
Next Packet
e
AD8
Count 0
Count 1
1 in Data Configuration Register
Pointer
0 in Data Configuration Register
Byte 0
Byte 1
AD7
Byte Count 1
Receive
Receive
Status
Byte 2
AD0
AD0
TL F 8582 – 58
e
0 or 1