DS3112N Maxim Integrated Products, DS3112N Datasheet - Page 132
![IC MUX TEMPE T3/E3 IND 256-BGA](/photos/6/82/68222/406-256-bga_sml.jpg)
DS3112N
Manufacturer Part Number
DS3112N
Description
IC MUX TEMPE T3/E3 IND 256-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3112.pdf
(133 pages)
Specifications of DS3112N
Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS3112N+
Manufacturer:
DALLAS
Quantity:
20 000
14.12 G.747 Framing Structure and E12 Multiplexing
The G.747 frame structure is made up of five 168-bit sets
after another (...Set1/Set2/Set3/Set4/Set5/Set1...) to make up the complete G.747 frame structure. The
Frame Alignment Signal (FAS) is placed in the first 9 bits of Set 1. Set 2 contains the Remote Alarm
Indication (RAI) bit and a Parity Bit (PAR) as well as a reserved bit, which is fixed to a one. The PAR bit
will be set to a one when there are odd numbers of ones from the tributaries in the preceding frame and it
will be set to a zero when there is an even number of ones. The parity calculation does not include the
FAS, RAI, reserved bit, or Justification Control Bits. The three tributaries are bit interleaved starting with
a bit from Tributary 1 immediately after the FAS in Set 1. The first three bits of Sets 3, 4, and 5 are the
Justification Control Bits. Bits 4 to 6 of Set 5 are the Stuffing Bits. The Justification Control bits control
when data will be stuffed into the Stuffing Bit positions. When a majority of the three Justification
Control Bits from a particular tributary is set to zero, the Stuffing Bit position will be used for tributary
data. When the Justification Control Bits are majority decoded to be one, the Stuffing Bit will not be used
for tributary data.
Figure 14-9. G.747 Frame Structure
Set 1
Bit 1
Set 2
Bit 1
Set 3
Bit 1
Set 4
Bit 1
Set 5
Bit 1
NOTE 1:
NOTE 2:
NOTE 3:
NOTE 4:
RAI
c
c
c
FAS (111010000)
11
12
13
BIT 1 OF SET 1 IS TRANSMITTED FIRST.
BJI
CJI
SJ
PAR
c
c
c
21
22
23
TRIBUTARY BITS
JUSTIFICATION CONTROL BITS
STUFFING BITS
c
c
c
1
31
32
33
b
11
s
1
b
21
s
2
b
31
J = TRIBUTARY NUMBER
J = TRIBUTARY NUMBER
J = TRIBUTARY NUMBER
s
3
b
132 of 133
12
...bits from the tributaries...
...bits from the tributaries...
...bits from the tributaries...
b
22
(Figure
b
I = BIT NUMBER
I = CONTROL STUFFING BIT NUMBER
32
...bits from the tributaries...
14-9). The five sets are transmitted one
b
13
...bits from the tributaries...
Bit 168
Bit 168
Bit 168
Bit 168
Bit 168
DS3112