TLE6263-3G Infineon Technologies, TLE6263-3G Datasheet - Page 4

• Manufacturer Part Number: TLE6263-3G
• Description: IC SYSTEM BASIS CHIP DSO-28
• Manufacturer: Infineon Technologies

Specifications of TLE6263-3G

• Controller Type: System Basis Chip
• Interface: SPI
• Voltage - Supply: 13.5V
• Current - Supply: 1mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: DSO-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000262119; TLE6263-3G; TLE6263-3GINTR

Revision 3.1
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Pin No.
1
2
3
4
5
6, 7, 8, 9,
20, 21,
22, 23
10
11
12
13
14
15
Pin Definitions and Functions
Symbol
TxD
RxD
RO
WK2
WK1
GND
DO
CLK
CSN
DI
OUTHS
V
S
Function
Transmit data input; integrated pull up;
LOW: bus becomes dominant, HIGH: bus becomes recessive
Receive data output; push-pull output;
LOW: bus becomes dominant, HIGH: bus becomes recessive
Reset output; open drain output, integrated pull up, active low
Wake-Up input 2; for detection of external wake-up events, edge
sensitive, in sleep mode monitored by cyclic sense feature when
selected; weak pull up (2µA) to avoid unwanted wake ups
Wake-Up input 1; for detection of external wake-up events, edge
sensitive, in sleep mode monitored by cyclic sense feature when
selected; weak pull up (2µA) to avoid unwanted weak ups
Ground; to reduce thermal resistance place cooling areas on
PCB close to this pins.
SPI data output; this tri-state output transfers diagnosis data to
the control device. Serial data transfered from DO is a 8 bit
diagnosis word with the Least Significant Bit (LSB) transmitted
first. The output will remain 3-stated unless the device is selected
by a LOW on Chip-Select-Not (CSN). DO will accept data on the
rising edge of CLK-signal; see table 4, 5, 6 for Diagnosis protocol
SPI clock input; clocks the shiftregister; CLK has a pull down
input, active HIGH, and requires CMOS logic level inputs
SPI chip select not input; CSN is a pull up input, active LOW,
serial communication is enabled by pulling the CSN terminal low;
CSN input should only be transitioned when CLK is low; CSN has
an internal active pull up and requires CMOS logic level inputs
SPI data input; receives serial data from the control device;
serial data transmitted to DI is a 8 bit control word with the Least
Significant Bit (LSB) being transferred first: the input has a pull
down input, active HIGH, and requires CMOS logic level inputs;
DI will accept data on the falling edge of CLK-signal; see table 3
for input data protocol
High side switch output; controlled via SPI, in sleep mode
controlled by internal cyclic sense function when selected
Power supply input; block to GND directly at the IC with ceramic
capacitor
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Data Sheet TLE 6263-3G
Sep. 19th, 2006