PEB2075N-V13TR Infineon Technologies, PEB2075N-V13TR Datasheet - Page 22

IC CONTROLLER D-CH EXCH 44-PLCC

PEB2075N-V13TR

Manufacturer Part Number
PEB2075N-V13TR
Description
IC CONTROLLER D-CH EXCH 44-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2075N-V13TR

Controller Type
Digital Exchange Controller
Interface
PCM
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
10mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEB2075N-V13INTR
PEB2075N-V13TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2075N-V13TR
Manufacturer:
LT
Quantity:
512
Part Number:
PEB2075N-V13TR
Manufacturer:
Infineon Technologies
Quantity:
10 000
Functional Description
2.4
Individual Functions
2.4.1 Channel Access
The four HDLC controllers of the IDEC are connected to the serial interfaces as shown in table 3.
The table indicates the selection of the data channel, the selectable time slot widths, the output
driver type, and the function of the active-low Tri-State Control (TSC) output in each of the operating
modes.
The data output is set in a high impedance state outside the time channel where data is transmitted.
OD = Open-drain driver,
PP = Push-pull driver.
The output driver type refers to the SD0X (or SD0X, SD1 X, SD2X and SD3X) outputs.
TSC is a push-pull signal.
Quad Connection Time-Slot Mode
Channel selection is performed via the Time-Slot Select Registers (TSR). For each HDLC channel,
the 8- bit TSR register gives the position of a time slot with a two-bit resolution. The length of the
time slot, either 1, 2, 7 or 8 bits, can be selected using the MODE register (CCS1, 0). These
parameters are common to the receive and the transmit channel.
In the case where the number of bits in a PCM frame is 256 or 512, the frame synchronization signal
FSC need not be provided at every PCM frame beginning, since bit counters are automatically reset
at frame end. When the PCM frame length is not equal to either 256 or 512 bits, the frame
synchronization signal has to be provided at the beginning of every PCM frame.
Semiconductor Group
22

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