CY7C68033-56LFXC Cypress Semiconductor Corp, CY7C68033-56LFXC Datasheet - Page 26

• Manufacturer Part Number: CY7C68033-56LFXC
• Description: IC USB NX2LP NAND CNTRLR 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C68033-56LFXC

• Controller Type: USB 2.0 NAND Flash Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 43mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Controller Family/series: (8051) USB
• No. Of I/o's: 12
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Digital Ic Case Style: QFN
• Supply Voltage Range: 3V To 3.6V
• Core Size: 8 Bit
• Program Memory Size: 15KB
• Embedded Interface Type: I2C, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3686 - DEV KIT USB 2.0 PER OLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 9. NX2LP-Flex Register Summary (continued)
1. The register can only be reset, it cannot be set.
2. SFRs not part of the standard 8051 architecture.
3. If no NAND is detected by the SIE then the default is 00000000.
Document Number: 001-04247 Rev. *H
BF
C0
C1
C2
C8
C9
CA
CB
CC
CD
CE
D0
D1
D8
D9
E0
E1
E8
E9
F0
F1
F8
F9
Hex Size Name
1
1
1
6
1
1
1
1
1
1
2
1
7
1
7
1
7
1
7
1
7
1
7
GPIFSGLDAT
LNOX
SCON1
SBUF1
reserved
T2CON
reserved
RCAP2L
RCAP2H
TL2
TH2
reserved
PSW
reserved
EICON
reserved
ACC
reserved
EIE
reserved
B
reserved
EIP
reserved
[2]
[2]
[2]
[2]
[2]
[2]
GPIF Data L w/No Trigger D7
Serial Port 1 Control (bit
addressable)
Serial Port 1 Data Buffer D7
Timer/Counter 2 Control
(bit addressable)
Capture for Timer 2, au-
to-reload, up-counter
Capture for Timer 2, au-
to-reload, up-counter
Timer 2 reload L
Timer 2 reload H
Program Status Word (bit
addressable)
External Interrupt Control SMOD1
Accumulator (bit address-
able)
External Interrupt En-
able(s)
B (bit addressable)
External Interrupt Priority
Control
Description
SM0_1
TF2
D7
D7
D7
D15
CY
D7
1
D7
1
b7
D6
SM1_1
D6
EXF2
D6
D6
D6
D14
AC
1
D6
1
D6
1
b6
D5
SM2_1
D5
RCLK
D5
D5
D5
D13
F0
ERESI
D5
1
D5
1
b5
D4
REN_1
D4
TCLK
D4
D4
D4
D12
RS1
RESI
D4
EX6
D4
PX6
b4
D3
TB8_1
D3
EXEN2
D3
D3
D3
D11
RS0
INT6
D3
EX5
D3
PX5
b3
D2
RB8_1
D2
TR2
D2
D2
D2
D10
OV
0
D2
EX4
D2
PX4
b2
CY7C68033, CY7C68034
D1
TI_1
D1
CT2
D1
D1
D1
D9
F1
0
D1
EI²C
D1
PI²C
b1
R = all bits read-only
W = all bits write-only
r = read-only bit
w = write-only bit
b = both read/write bit
D0
RI_1
D0
CPRL2
D0
D0
D0
D8
P
0
D0
EUSB
D0
PUSB
b0
Page 26 of 38
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00000000 RW
00000000 RW
00000000 RW
00000000 RW
00000000 RW
00000000 RW
00000000 RW
00000000 RW
01000000 RW
00000000 RW
11100000 RW
00000000 RW
11100000 RW
Default
R
Access
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