CY7C63801-PXC Cypress Semiconductor Corp, CY7C63801-PXC Datasheet - Page 37

• Manufacturer Part Number: CY7C63801-PXC
• Description: IC USB PERIPHERAL CTRLR 16-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63801-PXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: MDIP
• Mounting: Through Hole
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Document 38-08035 Rev. *F
Table 15-4. SPI SCLK Frequency
15.3
The SPI interface uses the P1.3–P1.6 pins. These pins are
configured using the P1.3 and P1.4–P1.6 Configuration.
16.0
All timer functions of the enCoRe II are provided by a single
timer block. The timer block is asynchronous from the CPU
clock.
16.1
16.1.1
Table 16-1. Free-running Timer Low-order Byte (FRTMRL) [0x20] [R/W]
16.1.2
Table 16-2. Free-running Timer High-order Byte (FRTMRH) [0x21] [R/W]
16.1.3
Table 16-3. Timer Capture 0 Rising (TCAP0R) [0x22] [R/W]
SCLK
Select
00
01
10
11
Bit [7:0]: Free-running Timer [7:0]
This register holds the low-order byte of the 16-bit free-running timer. Reading this register causes the high-order byte to be
moved into a holding register allowing an automatic read of all 16 bits simultaneously.
For reads, the actual read occurs in the cycle when the low order is read. For writes, the actual time the write occurs is the cycle
when the high order is written.
When reading the Free Running Timer, the low-order byte should be read first and the high-order second. When writing, the low-
order byte should be written first then the high-order byte
Bit [7:0]: Free-running Timer [15:8]
When reading the Free-running Timer, the low-order byte should be read first and the high-order second. When writing, the low-
o order byte should be written first then the high-order byte
Bit [7:0]: Capture 0 Rising [7:0]
This register holds the value of the Free-running Timer when the last rising edge occurred on the TCAP0 input. When Capture 0
is in 8-bit mode, the bits that are stored here are selected by the Prescale [2:0] bits in the Timer Configuration register. When
Capture 0 is in 16-bit mode this register holds the lower order 8 bits of the 16-bit timer
Read/Write
Read/Write
Read/Write
Default
Default
Default
Field
Field
Field
Bit #
Bit #
Bit #
SPI Interface Pins
Registers
Free-running Timer Low-order Byte
Free-running Timer High-order Byte
Timer Capture 0 Rising
Timer Registers
CPUCLK
Divisor
6
12
48
96
R/W
R/W
R/W
7
0
7
0
7
0
SCLK Frequency when CPUCLK =
12 MHz
2 MHz
1 MHz
250 KHz
125 KHz
R/W
R/W
R/W
6
0
6
0
6
0
24 MHz
4 MHz
2 MHz
500 KHz
250 KHz
R/W
R/W
R/W
5
0
5
0
5
0
Free-running Timer [15:8]
Free-running Timer [7:0]
R/W
R/W
R/W
Capture 0 Rising [7:0]
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
CY7C63310
CY7C638xx
CY7C639xx
Page 37 of 68
R/W
R/W
R/W
0
0
0
0
0
0
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