CY8C20110-LDX2I Cypress Semiconductor Corp, CY8C20110-LDX2I Datasheet - Page 34
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CY8C20110-LDX2I
Manufacturer Part Number
CY8C20110-LDX2I
Description
IC CAPSENSE EXP 10 I/O 16UQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense Express™ CY8C20xxxr
Datasheet
1.CY8C20160-SX2I.pdf
(39 pages)
Specifications of CY8C20110-LDX2I
Package / Case
16-UQFN, 16-µQFN
Controller Type
Capacitive Sensing Controller
Interface
I²C
Voltage - Supply
2.4 V ~ 5.25 V
Current - Supply
1.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8C201xx
Core
M8C
Data Bus Width
8 bit
Interface Type
I2C
Number Of Programmable I/os
10
Operating Supply Voltage
2.4 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3218-CAPEXP1
Minimum Operating Temperature
- 40 C
Program Memory Type
Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
428-2043 - KIT CAPSENSE EXPRESS CY8C20110770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2046
Glossary
Document Number: 001-54606 Rev. *E
compiler
configuration
space
crystal oscillator
cyclic redundancy
check (CRC)
data bus
debugger
dead band
digital blocks
digital-to-analog
(DAC)
duty cycle
emulator
External Reset
(XRES)
Flash
Flash block
frequency
gain
I
2
C
(continued)
A program that translates a high level language, such as C, into machine language.
In PSoC devices, the register space accessed when the XIO bit, in the CPU_F register, is set to
‘1’.
An oscillator in which the frequency is controlled by a piezoelectric crystal. Typically a piezoelectric
crystal is less sensitive to ambient temperature than other circuit components.
A calculation used to detect errors in data communications, typically performed using a linear
feedback shift register. Similar calculations may be used for a variety of other purposes such as
data compression.
A bi-directional set of signals used by a computer to convey information from a memory location
to the central processing unit and vice versa. More generally, a set of signals used to convey
data between digital functions.
A hardware and software system that allows you to analyze the operation of the system
under development. A debugger usually allows the developer to step through the firmware one
step at a time, set break points, and analyze memory.
A period of time when neither of two or more signals are in their active state or in transition.
The 8-bit logic blocks that can act as a counter, timer, serial receiver, serial transmitter, CRC
generator, pseudo-random number generator, or SPI.
A device that changes a digital signal to an analog signal of corresponding magnitude. The analog-
to-digital (ADC) converter performs the reverse operation.
The relationship of a clock period high time to its low time, expressed as a percent.
Duplicates (provides an emulation of) the functions of one system with a different system, so that
the second system appears to behave like the first system.
An active high signal that is driven into the PSoC device. It causes all operation of the CPU and
blocks to stop and return to a pre-defined state.
An electrically programmable and erasable, non-volatile technology that provides you the
programmability and data storage of EPROMs, plus in-system erasability. Non-volatile means
that the data is retained when power is OFF.
The smallest amount of Flash ROM space that may be programmed at one time and the smallest
amount of Flash space that may be protected. A Flash block holds 64 bytes.
The number of cycles or events per unit of time, for a periodic function.
The ratio of output current, voltage, or power to input current, voltage, or power, respectively.
Gain is usually expressed in dB.
A two-wire serial computer bus by Philips Semiconductors (now NXP Semiconductors). I2C is an
Inter-Integrated Circuit. It is used to connect low-speed peripherals in an embedded system. The
original system was created in the early 1980s as a battery control interface, but it was later used
as a simple internal bus system for building control electronics. I2C uses only two bi-directional
pins, clock and data, both running at +5V and pulled high with resistors. The bus operates at 100
kbits/second in standard mode and 400 kbits/second in fast mode.
CY8C20160, CY8C20140
CY8C20110, CY8C20180
CY8C20142
Page 34 of 39
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