CY8C20160-SX2I Cypress Semiconductor Corp, CY8C20160-SX2I Datasheet - Page 19

IC CAPSENSE EXP 6 I/O 16-SOIC

CY8C20160-SX2I

Manufacturer Part Number
CY8C20160-SX2I
Description
IC CAPSENSE EXP 6 I/O 16-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
CapSense Express™ CY8C20xxxr
Datasheet

Specifications of CY8C20160-SX2I

Package / Case
16-SOIC (3.9mm Width)
Controller Type
Capacitive Sensing Controller
Interface
I²C
Voltage - Supply
2.4 V ~ 5.25 V
Current - Supply
1.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8C201xx
Core
M8C
Data Ram Size
512 B
Interface Type
I2C
Maximum Clock Frequency
400 KHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3218-CAPEXP1
Minimum Operating Temperature
- 40 C
Program Memory Type
Flash
Program Memory Size
2 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2052-5

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Table 6. Recommended Layout Guidelines and Best Practices (continued)
Document Number: 001-54606 Rev. *E
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Sl
Trace routing
Via position for the sensors
Via hole size for sensor traces
Number of vias on sensor trace
CapSense series resistor
placement
Distance between any
CapSense trace to ground flood
Device placement
Placement of components in
2-layer PCB
Placement of components in
4-layer PCB
Overlay thickness-buttons
Overlay material
Overlay adhesives
LED back lighting
Board thickness
Category
10-mil
0 mm
Min
1
10 mm
20-mil
2 mm
Max
2
Traces should be routed on the non sensor side. If any non
CapSense trace crosses CapSense trace, ensure that
intersection is orthogonal.
Via should be placed near the edge of the button/slider to
reduce trace length thereby increasing sensitivity.
10-mil
1
Place CapSense series resistors close to PSoC for noise
suppression. CapSense resistors have highest priority place
them first.
20-mil
Mount the device on the layer opposite to sensor. The
CapSense trace length between the device and sensors
should be minimum
Top layer – sensor pads and bottom layer – PSoC, other
components, and traces.
Top layer – sensor pads, second layer – CapSense traces,
third layer – hatched ground, bottom layer – PSoC, other
components, and non CapSense traces
1 mm
Should to be non conductive material. Glass, ABS plastic,
Formica
Adhesive should be non conductive and dielectrically
homogenous. 467MP and 468MP adhesives made by 3M are
recommended.
Cut a hole in the sensor pad and use rear mountable LEDs.
Refer the PCB layout below.
Standard board thickness for CapSense FR4 based designs
is 1.6 mm.
Recommendations/Remarks
CY8C20160, CY8C20140
CY8C20110, CY8C20180
CY8C20142
Page 19 of 39
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