ENC28J60/SS Microchip Technology, ENC28J60/SS Datasheet - Page 2

• Manufacturer Part Number: ENC28J60/SS
• Description: IC ETHERNET CTRL 8K W/SPI 28SSOP
• Manufacturer: Microchip Technology

Specifications of ENC28J60/SS

• Package / Case: 28-SSOP
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: SPI
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 160mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.1 V to 3.6 V
• Supply Current (max): 180 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC28J60
TABLE 2:
TABLE 3:
DS80349C-page 2
MAC
Interface
Reset
Core
Oscillator
Memory
Interrupts
PHY
PHY
PHY
PHY
PHY LEDs
Transmit
Logic
PHY
Memory
Transmit
Logic
PHY LEDs
DMA
Receive
Filter
SPI
Interface
Module
Issue
1.
2.
3.
TP_IDL transmit waveform violates IEEE STD 802.3™ template
PHY accepts receive packet in Link Test Fail state
Collision enforcement is delayed
Operating
Specifications
CLKOUT pin
Ethernet
Buffer
Ethernet
Buffer
SILICON ISSUE SUMMARY
ETHERNET CONFORMANCE ISSUES
Feature
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Issue
10.
12.
13.
14.
15.
16.
17.
18.
19.
11.
1.
2.
3.
4.
5.
6.
7.
8.
9.
MAC registers unreliable with slow asynchronous SPI
clock
CLKRDY set early
Industrial (-40C to +85C) temperature range
unsupported
CLKOUT unavailable in Power Save mode
Receive buffer must start at 0000h
Receive Packet Pending Interrupt Flag (PKTIF) unreliable
TPIN+/- automatic polarity detection and correction
unreliable
RBIAS resistor value differs between silicon revisions
Internal loopback in half-duplex unreliable
Internal loopback in full-duplex unreliable
Combined Collision and Duplex Status mode unavailable
Transmit abort may stall transmit logic
Received link pulses potentially cause collisions
Even values in ERXRDPT may corrupt receive buffer
LATECOL Status bit unreliable
LED auto-polarity detection unreliable
DMA checksum calculations will abort receive packets
Pattern match filter allows reception of extra packets
Reset command unavailable in Power Save mode
Issue Summary
Issue Summary
 2010 Microchip Technology Inc.
B1
X
X
X
B1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Revisions
Affected
Revisions
B4
X
X
X
Affected
B4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
B5
B5 B7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
B7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X