EMC6D103-CZC SMSC, EMC6D103-CZC Datasheet - Page 75

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EMC6D103-CZC

Manufacturer Part Number
EMC6D103-CZC
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC6D103-CZC

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EMC6D103-CZC
Manufacturer:
SMSC
Quantity:
20 000
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.24
8.2.25
8.2.26
Register
Address
Register
Address
Register
Address
7Ah
79h
7Bh
Read/
Write
/Write
Read
Read/
Write
R/W
R
The part incorporates an XOR tree test mode. When the test mode is enabled by setting the ‘XEN’ bit
high via SMBus, the part enters XOR test mode.
The following signals are included in the XOR test tree:
Since the test mode is XOR tree, the order of the signals in the tree is not important. SDA and SCL
are not included in the test tree.
Register 79h: SMSC Test Register
This is a read/write register. Writing this register may produce unwanted results.
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
Register 7Ah: SMSC Test Register
This is a read/write register. Writing this register may produce unwanted results.
Register 7Bh: SMSC Test Register
R/W
This is a read/write register. Writing this register may produce unwanted results.
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
VID0, VID1, VID2, VID3, VID4
TACH1, TACH2, TACH3, TACH4
PWM2, PWM3
SMSC Test Register
Register Name
SMSC Test Register
SMSC Test Register
Register Name
Register Name
Table 8.44 Register 7Ah: SMSC Test Register
Table 8.45 Register 7Bh: SMSC Test Register
Table 8.43 Register 79h: SMSC Test Register
(MSb)
Bit 7
RES
(MSb)
TST7
Bit 7
DATASHEET
(MSb)
TST7
Bit 7
TST6
Bit 6
TST6
Bit 6
75
TST6
Bit 6
TST5
Bit 5
TST5
Bit 5
TST5
Bit 5
TST4
Bit 4
TST4
Bit 4
TST4
Bit 4
TST3
Bit 3
TST3
Bit 3
TST3
Bit 3
TST2
TST2
Bit 2
Bit 2
TST2
Bit 2
TST1
TST1
TST1
Bit 1
Bit 1
Bit 1
Revision 0.3 (03-01-07)
(LSb)
TST0
(LSb)
(LSb)
Bit 0
TST0
TST0
Bit 0
Bit 0
Default
Default
Default
Value
Value
Value
00h
00h
00h

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