EMC1423-1-AIZL-TR SMSC, EMC1423-1-AIZL-TR Datasheet - Page 32

• Manufacturer Part Number: EMC1423-1-AIZL-TR
• Description: Board Mount Temperature Sensors TRIPLE TEMP SNSR
• Manufacturer: SMSC

Specifications of EMC1423-1-AIZL-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADDR
03h
09h
Revision 1.36 (07-02-09)
6.4
R/W
R/W
Configuration
REGISTER
The Status Register reports general error conditions. To identify specific channels, refer to
Section
appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared.
Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either
the ALERT or THERM pin to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit.
See the High Limit Status Register for specific channel information
will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low
limit. See the Low Limit Status Register for specific channel information
bit will assert the ALERT pin.
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode
channels. See the External Diode Fault Register for specific channel information
set, this bit will assert the ALERT pin.
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed
THERM limit. See the THERM Limit Status Register for specific channel information
Bit 0 - HWSD - This bit is set when the External Diode 1 Temperature exceeds the Hardware Thermal
Shutdown Limit set by the pull-up resistors on the ALERT and SYS_SHDN pins. When set, this bit will
assert the SYS_SHDN pin.
The Configuration Register controls the basic operation of the device. This register is fully accessible
at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
Bit 3 - RECD2 - Disables the Resistance Error Correction (REC) for External Diode 2 and External
Diode 3.
Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels.
Configuration Register
‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT
pin will be asserted.
‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is
configured as a THERM pin. The Status Registers will be updated normally.
‘0’ (default) - The ALERT pin acts as described in
‘1’ - The ALERT pin acts in comparator mode as described in
MASK_ALL bit is ignored.
‘0’ (default) - REC is enabled for External Diode 2 and External Diode 3.
‘1’ - REC is disabled for External Diode 2 and External Diode 3.
‘0’ (default) - The temperature measurement range is 0°C to +127.875°C and the data format is
binary.
‘1’ -The temperature measurement range is -64°C to +191.875°C and the data format is offset
binary (see
6.16,
MASK_
Section
ALL
B7
Table
5.4).
6.17, and
B6
-
Table 6.4 Configuration Register
Section
ALERT/
COMP
DATASHEET
B5
6.18. The individual Status Register bits are cleared when the
32
B4
-
1°C Temperature Sensor with Hardware Thermal Shutdown
Section
RECD2
B3
5.3.
Section
RANGE
(Section
B2
(Section
5.3.2. In this mode the
6.16). When set, this bit
SMSC EMC1423/EMC1424
DAVG_
DIS
B1
6.17). When set, this
(Section
(Section
APDD
Section
6.9). When
B0
-
Datasheet
6.18).
6.9,
DEFAULT
00h